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[50.57.142.19]) by mx.google.com with ESMTPS id d10si6987496qar.59.2014.11.05.07.48.36 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 05 Nov 2014 07:48:36 -0800 (PST) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xm2nB-00078Z-PR; Wed, 05 Nov 2014 15:46:41 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xm2nA-00078U-Mj for xen-devel@lists.xen.org; Wed, 05 Nov 2014 15:46:40 +0000 Received: from [193.109.254.147] by server-3.bemta-14.messagelabs.com id F4/AD-02953-0664A545; Wed, 05 Nov 2014 15:46:40 +0000 X-Env-Sender: frediano.ziglio@huawei.com X-Msg-Ref: server-8.tower-27.messagelabs.com!1415202397!12769557!1 X-Originating-IP: [206.16.17.72] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMjA2LjE2LjE3LjcyID0+IDE2MDI3\n X-StarScan-Received: X-StarScan-Version: 6.12.4; banners=-,-,- X-VirusChecked: Checked Received: (qmail 10535 invoked from network); 5 Nov 2014 15:46:39 -0000 Received: from dfwrgout.huawei.com (HELO dfwrgout.huawei.com) (206.16.17.72) by server-8.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 5 Nov 2014 15:46:39 -0000 Received: from 172.18.9.243 (EHLO lhreml402-hub.china.huawei.com) ([172.18.9.243]) by dfwrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id AYY82315; Wed, 05 Nov 2014 09:46:34 -0600 (CST) Received: from LHREML509-MBB.china.huawei.com ([10.201.4.152]) by lhreml402-hub.china.huawei.com ([10.201.5.241]) with mapi id 14.03.0158.001; Wed, 5 Nov 2014 15:46:25 +0000 From: Frediano Ziglio To: Julien Grall , Ian Campbell , Stefano Stabellini , Tim Deegan Thread-Topic: [PATCH v3 8/8] xen/arm: Handle translated addresses for hardware domains Thread-Index: AQHP+Nz5JXxbZDhNFky+GUtoHCI5CpxSFRmAgAAOuCCAAATYAIAABJGg Date: Wed, 5 Nov 2014 15:46:25 +0000 Message-ID: References: <1415180475-8339-1-git-send-email-frediano.ziglio@huawei.com> <1415180475-8339-9-git-send-email-frediano.ziglio@huawei.com> <545A31C7.3070202@linaro.org> <545A4230.9030506@linaro.org> In-Reply-To: <545A4230.9030506@linaro.org> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.47.71.64] MIME-Version: 1.0 X-CFilter-Loop: Reflected Cc: Zoltan Kiss , "xen-devel@lists.xen.org" Subject: Re: [Xen-devel] [PATCH v3 8/8] xen/arm: Handle translated addresses for hardware domains X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: frediano.ziglio@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Content-Language: en-US > On 11/05/2014 03:13 PM, Frediano Ziglio wrote: > > How does sound something like this (already tested, it's working). > > The idea looks good to me. Few comments below. > > Also, I'm wondering if we could create a generic function for this > purpose. The code of the GICv3 suffers of the same problem. > > > Perhaps just to be paranoid a test on len after reading reg property > would be perfect. > > The property/node has been validated in the GICv2 initialization. > Checking again here is not necessary. > > > > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index > > 2f6bbd5..2c4d097 100644 > > --- a/xen/arch/arm/gic-v2.c > > +++ b/xen/arch/arm/gic-v2.c > > @@ -632,7 +632,7 @@ static int gicv2_make_dt_node(const struct domain > *d, > > const void *compatible = NULL; > > u32 len; > > __be32 *new_cells, *tmp; > > - int res = 0; > > + int res = 0, na, ns; > > > > compatible = dt_get_property(gic, "compatible", &len); > > if ( !compatible ) > > @@ -664,15 +664,27 @@ static int gicv2_make_dt_node(const struct > domain *d, > > if ( res ) > > return res; > > > > - len = dt_cells_to_size(dt_n_addr_cells(node) + > dt_n_size_cells(node)); > > + /* copy GICC and GICD regions */ > > + na = dt_n_addr_cells(node); > > + ns = dt_n_size_cells(node); > > + > > + if ( na != dt_n_addr_cells(gic) || ns != dt_n_size_cells(gic) ) > > + return -FDT_ERR_XEN(EINVAL); > > Not necessary, the caller of this function already check that gic (i.e > dt_interrupt_controller) == node. > > If you really to be safe, I would add ASSERT(gic == node); > > > + > > + tmp = (__be32 *) dt_get_property(gic, "reg", &len); > > The cast is not necessary. > > > + if ( !tmp ) > > + { > > + dprintk(XENLOG_ERR, "Can't find reg property for the gic > node\n"); > > + return -FDT_ERR_XEN(ENOENT); > > + } > > + > > + len = dt_cells_to_size(na + ns); > > len *= 2; /* GIC has two memory regions: Distributor + CPU > interface */ > > new_cells = xzalloc_bytes(len); > > if ( new_cells == NULL ) > > return -FDT_ERR_XEN(ENOMEM); > > > > - tmp = new_cells; > > - dt_set_range(&tmp, node, d->arch.vgic.dbase, PAGE_SIZE); > > - dt_set_range(&tmp, node, d->arch.vgic.cbase, PAGE_SIZE * 2); > > + memcpy(new_cells, tmp, len); > > You don't need to copy the data in the temporary variable. You can > directly use fdt_property with the right len. Smth like: > > fdt_property(fdt, "reg", tmp, len); > > Regards, > > -- > Julien Grall This then should look much better. diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 2f6bbd5..9b9e696 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -629,9 +629,8 @@ static int gicv2_make_dt_node(const struct domain *d, const struct dt_device_node *node, void *fdt) { const struct dt_device_node *gic = dt_interrupt_controller; - const void *compatible = NULL; + const void *compatible = NULL, *tmp; u32 len; - __be32 *new_cells, *tmp; int res = 0; compatible = dt_get_property(gic, "compatible", &len); @@ -664,18 +663,18 @@ static int gicv2_make_dt_node(const struct domain *d, if ( res ) return res; + /* copy GICC and GICD regions */ + tmp = dt_get_property(gic, "reg", &len); + if ( !tmp ) + { + dprintk(XENLOG_ERR, "Can't find reg property for the gic node\n"); + return -FDT_ERR_XEN(ENOENT); + } + len = dt_cells_to_size(dt_n_addr_cells(node) + dt_n_size_cells(node)); len *= 2; /* GIC has two memory regions: Distributor + CPU interface */ - new_cells = xzalloc_bytes(len); - if ( new_cells == NULL ) - return -FDT_ERR_XEN(ENOMEM); - - tmp = new_cells; - dt_set_range(&tmp, node, d->arch.vgic.dbase, PAGE_SIZE); - dt_set_range(&tmp, node, d->arch.vgic.cbase, PAGE_SIZE * 2); - res = fdt_property(fdt, "reg", new_cells, len); - xfree(new_cells); + res = fdt_property(fdt, "reg", tmp, len); return res; }