From patchwork Sun Apr 28 23:02:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 16487 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-gh0-f200.google.com (mail-gh0-f200.google.com [209.85.160.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0F90F2395E for ; Sun, 28 Apr 2013 23:03:48 +0000 (UTC) Received: by mail-gh0-f200.google.com with SMTP id 10sf9146629ghy.3 for ; Sun, 28 Apr 2013 16:02:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:mime-version:x-beenthere:x-received:received-spf :x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=iW53zVPMKRAhAP5KtK0VhzItcdUrJgoiefii1jBYo7Y=; b=EXcbKMUftURjOd0nmfavrp24rkbUmVD1uC9MKwkKz77yd6O1yc2GIauPn+kZWCx1rO j4RZ6KSD7JvNAHNTKFnrKQJQes40FSmI6/bLZGNiankRZhGyewvwkXveW10rdQ0LRbFm I8wg+xx7C9yRb++3i6AHT2FoN+GwRvM1ZhWcrQEZsoOasFkS4zd1bjBvaD/u+rRL2Mob 5XL7S6v2U/DEdUm3fsO70SIP5K3J7LJKLboGSvDO6Nz8/ImbPFYrQ4nqoejl8D+y/IMM I73MCoBSJ525UG41wTvneY/gI5dLI5Q2EMVpAhvR1sD51hbAAKFDQWmPzELIj1YUKJES erMQ== X-Received: by 10.224.160.65 with SMTP id m1mr38779719qax.2.1367190166872; Sun, 28 Apr 2013 16:02:46 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.130.200 with SMTP id og8ls2428610qeb.61.gmail; Sun, 28 Apr 2013 16:02:46 -0700 (PDT) X-Received: by 10.220.106.74 with SMTP id w10mr12070096vco.11.1367190166696; Sun, 28 Apr 2013 16:02:46 -0700 (PDT) Received: from mail-vc0-f175.google.com (mail-vc0-f175.google.com [209.85.220.175]) by mx.google.com with ESMTPS id r3si8971410vco.41.2013.04.28.16.02.46 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 28 Apr 2013 16:02:46 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.175; Received: by mail-vc0-f175.google.com with SMTP id lf10so4988392vcb.20 for ; Sun, 28 Apr 2013 16:02:46 -0700 (PDT) X-Received: by 10.220.169.78 with SMTP id x14mr17308472vcy.41.1367190166573; Sun, 28 Apr 2013 16:02:46 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.58.127.98 with SMTP id nf2csp33804veb; Sun, 28 Apr 2013 16:02:46 -0700 (PDT) X-Received: by 10.194.59.208 with SMTP id b16mr9747500wjr.15.1367190165112; Sun, 28 Apr 2013 16:02:45 -0700 (PDT) Received: from mail-wg0-x234.google.com (mail-wg0-x234.google.com [2a00:1450:400c:c00::234]) by mx.google.com with ESMTPS id e9si3460881wik.28.2013.04.28.16.02.44 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 28 Apr 2013 16:02:45 -0700 (PDT) Received-SPF: neutral (google.com: 2a00:1450:400c:c00::234 is neither permitted nor denied by best guess record for domain of julien.grall@linaro.org) client-ip=2a00:1450:400c:c00::234; Received: by mail-wg0-f52.google.com with SMTP id k13so3272373wgh.7 for ; Sun, 28 Apr 2013 16:02:44 -0700 (PDT) X-Received: by 10.194.122.166 with SMTP id lt6mr79162305wjb.14.1367190164732; Sun, 28 Apr 2013 16:02:44 -0700 (PDT) Received: from belegaer.uk.xensource.com. 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[46.33.159.2]) by mx.google.com with ESMTPSA id k5sm18711393wiy.5.2013.04.28.16.02.43 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 28 Apr 2013 16:02:44 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: ian.campbell@citrix.com, patches@linaro.org, anthony.perard@citrix.com, stefano.stabellini@eu.citrix.com, Julien Grall Subject: [RFC 21/29] xen/arm: WORKAROUND 1:1 memory mapping for dom0 Date: Mon, 29 Apr 2013 00:02:04 +0100 Message-Id: <4a671e00687b44ae527acf19ea21da07380fdf42.1367188423.git.julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: References: X-Gm-Message-State: ALoCoQmYsmZmXhhbGKj7IrYggEGfpOaLRKdROX5enmXhlxxisuwhlt/ltHvd5ZafOo+gSs6Z7SQe X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Currently xen doesn't implement SYS MMU. When a device will talk with dom0 with DMA request the domain will use GFN instead of MFN. For instance on the arndale board, without this patch the network doesn't work. The 1:1 mapping is a workaround and MUST be remove as soon as a SYS MMU is implemented in XEN. Signed-off-by: Julien Grall --- xen/arch/arm/domain_build.c | 51 ++++++++++++++++++++++++------------------- xen/arch/arm/kernel.h | 1 - 2 files changed, 28 insertions(+), 24 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index ced73a7..11298e1 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -66,29 +66,36 @@ static int set_memory_reg(struct domain *d, struct kernel_info *kinfo, int address_cells, int size_cells, u32 *new_cell) { int reg_size = (address_cells + size_cells) * sizeof(*cell); - int l = 0; - u64 start; - u64 size; + paddr_t start; + paddr_t size; + struct page_info *pg; + unsigned int order = get_order_from_bytes(dom0_mem); + int res; + paddr_t spfn; - while ( kinfo->unassigned_mem > 0 && l + reg_size <= len - && kinfo->mem.nr_banks < NR_MEM_BANKS ) - { - device_tree_get_reg(&cell, address_cells, size_cells, &start, &size); - if ( size > kinfo->unassigned_mem ) - size = kinfo->unassigned_mem; - device_tree_set_reg(&new_cell, address_cells, size_cells, start, size); - - printk("Populate P2M %#"PRIx64"->%#"PRIx64"\n", start, start + size); - p2m_populate_ram(d, start, start + size); - kinfo->mem.bank[kinfo->mem.nr_banks].start = start; - kinfo->mem.bank[kinfo->mem.nr_banks].size = size; - kinfo->mem.nr_banks++; - kinfo->unassigned_mem -= size; - - l += reg_size; - } + pg = alloc_domheap_pages(d, order, 0); + if ( !pg ) + panic("Failed to allocate contiguous memory for dom0\n"); + + spfn = page_to_mfn(pg); + start = spfn << PAGE_SHIFT; + size = (1 << order) << PAGE_SHIFT; + + // 1:1 mapping + printk("Populate P2M %#"PRIx64"->%#"PRIx64" (1:1 mapping for dom0)\n", + start, start + size); + res = guest_physmap_add_page(d, spfn, spfn, order); - return l; + if ( res ) + panic("Unable to add pages in DOM0: %d\n", res); + + device_tree_set_reg(&new_cell, address_cells, size_cells, start, size); + + kinfo->mem.bank[0].start = start; + kinfo->mem.bank[0].size = size; + kinfo->mem.nr_banks = 1; + + return reg_size; } static int write_properties(struct domain *d, struct kernel_info *kinfo, @@ -434,8 +441,6 @@ static int prepare_dtb(struct domain *d, struct kernel_info *kinfo) int new_size; int ret; - kinfo->unassigned_mem = dom0_mem; - fdt = device_tree_flattened; new_size = fdt_totalsize(fdt) + DOM0_FDT_EXTRA_SIZE; diff --git a/xen/arch/arm/kernel.h b/xen/arch/arm/kernel.h index 1776a4d..687f6c4 100644 --- a/xen/arch/arm/kernel.h +++ b/xen/arch/arm/kernel.h @@ -15,7 +15,6 @@ struct kernel_info { #endif void *fdt; /* flat device tree */ - paddr_t unassigned_mem; /* RAM not (yet) assigned to a bank */ struct dt_mem_info mem; paddr_t dtb_paddr;