From patchwork Sun Apr 28 23:02:10 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 16493 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ve0-f200.google.com (mail-ve0-f200.google.com [209.85.128.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 4D9C52395E for ; Sun, 28 Apr 2013 23:03:55 +0000 (UTC) Received: by mail-ve0-f200.google.com with SMTP id ox1sf5817485veb.7 for ; Sun, 28 Apr 2013 16:02:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:mime-version:x-beenthere:x-received:received-spf :x-received:x-forwarded-to:x-forwarded-for:delivered-to:x-received :received-spf:x-received:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=Udest9/Sm3rDRnQJh66J97A7/8rvjrFErxggCbzTzCU=; b=d3TbzpQ/k0LqSZjeQknSbfiIHbGj8+mu6jgc9u1Wj2yEoZLO78m5ewkF95R7KHTFrm WiIcF1mQhKCyzSBb1OzSdistEUo/zYfOAN311FEYeywu1cM5IaUTyETaYe+YOvpzA5lR JuEIKIRR6NU3HAtcBC0eiRs1ayekiSKe7KYbnsqPqa+KrwiFgBJ4nZuI5ik9nbpsYQom 6H0tcHEzeW0x+Lspz8N0fQTEso7fSGzzBDEtYaMVJwSwII+3FvPmxbNqFXPbkIQFxXta QfYmHW3h1jA/NULG/dAgloysq9WKYwrDVRriXUJV7HkAsIiHSGKBGoViknSPfaf3hscY 5/Yw== X-Received: by 10.224.10.6 with SMTP id n6mr35038719qan.4.1367190174170; Sun, 28 Apr 2013 16:02:54 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.97.229 with SMTP id ed5ls2452755qeb.32.gmail; Sun, 28 Apr 2013 16:02:54 -0700 (PDT) X-Received: by 10.52.114.135 with SMTP id jg7mr27424014vdb.78.1367190174005; Sun, 28 Apr 2013 16:02:54 -0700 (PDT) Received: from mail-vb0-x235.google.com (mail-vb0-x235.google.com [2607:f8b0:400c:c02::235]) by mx.google.com with ESMTPS id ow6si8959267vcb.63.2013.04.28.16.02.53 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 28 Apr 2013 16:02:54 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c02::235 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c02::235; Received: by mail-vb0-f53.google.com with SMTP id i3so1763887vbh.26 for ; Sun, 28 Apr 2013 16:02:53 -0700 (PDT) X-Received: by 10.52.66.101 with SMTP id e5mr421825vdt.57.1367190173842; Sun, 28 Apr 2013 16:02:53 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.58.127.98 with SMTP id nf2csp33813veb; Sun, 28 Apr 2013 16:02:53 -0700 (PDT) X-Received: by 10.180.87.170 with SMTP id az10mr14301373wib.3.1367190172830; Sun, 28 Apr 2013 16:02:52 -0700 (PDT) Received: from mail-we0-x22c.google.com (mail-we0-x22c.google.com [2a00:1450:400c:c03::22c]) by mx.google.com with ESMTPS id nj19si3443396wic.109.2013.04.28.16.02.52 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 28 Apr 2013 16:02:52 -0700 (PDT) Received-SPF: neutral (google.com: 2a00:1450:400c:c03::22c is neither permitted nor denied by best guess record for domain of julien.grall@linaro.org) client-ip=2a00:1450:400c:c03::22c; Received: by mail-we0-f172.google.com with SMTP id r6so922202wey.3 for ; Sun, 28 Apr 2013 16:02:52 -0700 (PDT) X-Received: by 10.180.94.196 with SMTP id de4mr14103433wib.23.1367190172351; Sun, 28 Apr 2013 16:02:52 -0700 (PDT) Received: from belegaer.uk.xensource.com. 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[46.33.159.2]) by mx.google.com with ESMTPSA id k5sm18711393wiy.5.2013.04.28.16.02.51 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 28 Apr 2013 16:02:51 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: ian.campbell@citrix.com, patches@linaro.org, anthony.perard@citrix.com, stefano.stabellini@eu.citrix.com, Julien Grall Subject: [RFC 27/29] xen/arm: Add platform specific code for the exynos5 Date: Mon, 29 Apr 2013 00:02:10 +0100 Message-Id: <490810fcb462fc22a10fe8ff566decd6645ecd60.1367188423.git.julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: References: X-Gm-Message-State: ALoCoQms+BtxcX8kUPCDkjqLmp6jkuTkfGhETyE3889AOaJiVr/2jQk6iqsf/S5ZZNbbEYbn9+yo X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c02::235 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Julien Grall --- xen/arch/arm/platforms/Makefile | 1 + xen/arch/arm/platforms/exynos5.c | 105 +++++++++++++++++++++++++++++++ xen/include/asm-arm/platforms/exynos5.h | 40 ++++++++++++ 3 files changed, 146 insertions(+) create mode 100644 xen/arch/arm/platforms/exynos5.c create mode 100644 xen/include/asm-arm/platforms/exynos5.h diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile index 4313e95..ff2b65b 100644 --- a/xen/arch/arm/platforms/Makefile +++ b/xen/arch/arm/platforms/Makefile @@ -1 +1,2 @@ obj-y += vexpress.o +obj-y += exynos5.o diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.c new file mode 100644 index 0000000..01e12b7 --- /dev/null +++ b/xen/arch/arm/platforms/exynos5.c @@ -0,0 +1,105 @@ +/* + * xen/arch/arm/platforms/exynos5.c + * + * Exynos5 specific settings + * + * Julien Grall + * Copyright (c) 2013 Linaro Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +static int exynos5_init_time(void) +{ + uint32_t reg; + + // enable timer on exynos5 arndale board + // should probably be done by u-boot + reg = platform_read_register(EXYNOS5_MCT_G_TCON); + platform_write_register(EXYNOS5_MCT_G_TCON, reg | EXYNOS5_MCT_G_TCON_START); + + return 0; +} + +/* Additionnal mapping for dom0 (Not in the DTS) */ +static int exynos5_specific_mapping(struct domain *d) +{ + paddr_t ma = 0; + uint32_t *dst; + int res; + + /* + * Set temporary guest traps with 0xe14fff7c which is hvc(0xfffc) + * a hyp panic! + * TODO: Find why: + * 1) Xen abort directly after local_abort_enable when + * the p2m_populate_ram is not here. + * 2) Linux doesn't start without this trick + */ + p2m_populate_ram(d, 0x0, 0x1000 - 1); + + res = gvirt_to_maddr(0, &ma); + if ( res ) + { + printk(XENLOG_ERR "Unable to translate guest address\n"); + return -EFAULT; + } + + dst = map_domain_page(ma >> PAGE_SHIFT); + dst[2] = 0xe14fff7c; + unmap_domain_page(dst); + + /* Map the chip ID */ + map_mmio_regions(d, EXYNOS5_PA_CHIPID, EXYNOS5_PA_CHIPID + PAGE_SIZE - 1, + EXYNOS5_PA_CHIPID); + + /* Map the PWM region */ + map_mmio_regions(d, EXYNOS5_PA_TIMER, + EXYNOS5_PA_TIMER + (PAGE_SIZE * 2) - 1, + EXYNOS5_PA_TIMER); + + return 0; +} + +static void exynos5_reset(void) +{ + platform_write_register(EXYNOS5_SWRESET, 1); +} + +static const char const *exynos5_dt_compat[] __initdata = +{ + "samsung,exynos5250", + NULL +}; + +PLATFORM_START(exynos5, "SAMSUNG EXYNOS5") + .compatible = exynos5_dt_compat, + .init_time = exynos5_init_time, + .specific_mapping = exynos5_specific_mapping, + .reset = exynos5_reset, +PLATFORM_END + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/platforms/exynos5.h b/xen/include/asm-arm/platforms/exynos5.h new file mode 100644 index 0000000..d77623c --- /dev/null +++ b/xen/include/asm-arm/platforms/exynos5.h @@ -0,0 +1,40 @@ +#ifndef __ASM_ARM_PLATFORMS_EXYNOS5_H +#define __ASM_ASM_PLATFORMS_EXYSNO5_H + +#define EXYNOS5_MCT_BASE 0x101c0000 +#define EXYNOS5_MCTREG(x) (EXYNOS5_MCT_BASE + (x)) +#define EXYNOS5_MCT_G_TCON EXYNOS5_MCTREG(0x240) +#define EXYNOS5_MCT_G_TCON_START (1 << 8) + +#define EXYNOS5_PA_CHIPID 0x10000000 +#define EXYNOS5_PA_TIMER 0x12dd0000 +/* Base address of system controller */ +#define EXYNOS5_PA_PMU 0x10040000 + +#define EXYNOS5_SWRESET (EXYNOS5_PA_PMU + 0x0400) + +#define S5P_PA_SYSRAM 0x02020000 + +/* Constants below is only used in assembly because the DTS is not yet parsed */ +#ifdef __ASSEMBLY__ + +/* GIC Base Address */ +#define EXYNOS5_GIC_BASE_ADDRESS 0x10480000 + +/* Timer's frequency */ +#define EXYNOS5_TIMER_FREQUENCY (24 * 1000 * 1000) /* 24 MHz */ + +/* Arndale machine ID */ +#define MACH_TYPE_SMDK5250 3774 + +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_ARM_PLATFORMS_EXYNOS5_H */ +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */