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[83.153.85.71]) by mx.google.com with ESMTPSA id fs9sm25926124wjc.34.2015.05.05.07.48.47 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 05 May 2015 07:48:48 -0700 (PDT) From: Ard Biesheuvel To: olivier.martin@arm.com, edk2-devel@lists.sourceforge.net, ronald.cron@arm.com Date: Tue, 5 May 2015 16:48:35 +0200 Message-Id: <1430837315-7388-6-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430837315-7388-1-git-send-email-ard.biesheuvel@linaro.org> References: <1430837315-7388-1-git-send-email-ard.biesheuvel@linaro.org> X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_PASS SPF: sender matches SPF record 0.0 AWL AWL: Adjusted score from AWL reputation of From: address X-Headers-End: 1Ype9Y-0005iQ-H7 Subject: [edk2] [PATCH 5/5] ArmVExpressPkg: add support for embedding DTBs for AArch64 variants X-BeenThere: edk2-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list Reply-To: edk2-devel@lists.sourceforge.net List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.sourceforge.net X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 If DTB_DIR= is set during the build, incorporate DTBs from that path for all AArch64 FVP platform variants so that they can be loaded straight from the firmware image instead of from a file system. This relieves a user of having to keep a DTB file with the right name in the working directory of the model. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf | 25 ++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf index 1c709771b571..0076d3da0cb5 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf @@ -210,6 +210,31 @@ READ_LOCK_STATUS = TRUE # FV Filesystem INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf +!ifdef $(DTB_DIR) + # + # Embed flattened device tree (FDT) images for all known + # variants of this platform + # + FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2) { + $(DTB_DIR)/fvp-base-gicv2-psci.dtb + } + FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2Legacy) { + $(DTB_DIR)/fvp-base-gicv2legacy-psci.dtb + } + FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV3) { + $(DTB_DIR)/fvp-base-gicv3-psci.dtb + } + FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2) { + $(DTB_DIR)/fvp-foundation-gicv2-psci.dtb + } + FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2Legacy) { + $(DTB_DIR)/fvp-foundation-gicv2legacy-psci.dtb + } + FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV3) { + $(DTB_DIR)/fvp-foundation-gicv3-psci.dtb + } +!endif + [FV.FVMAIN_COMPACT] FvAlignment = 16 ERASE_POLARITY = 1