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[216.34.181.88]) by mx.google.com with ESMTPS id n15si1091438igk.2.2015.02.12.03.20.16 (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 12 Feb 2015 03:20:16 -0800 (PST) Received-SPF: pass (google.com: domain of edk2-devel-bounces@lists.sourceforge.net designates 216.34.181.88 as permitted sender) client-ip=216.34.181.88; Received: from localhost ([127.0.0.1] helo=sfs-ml-4.v29.ch3.sourceforge.com) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1YLroX-0002Nu-0H; Thu, 12 Feb 2015 11:20:09 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1YLroV-0002No-Uc for edk2-devel@lists.sourceforge.net; Thu, 12 Feb 2015 11:20:07 +0000 Received-SPF: pass (sog-mx-4.v43.ch3.sourceforge.com: domain of linaro.org designates 209.85.220.53 as permitted sender) client-ip=209.85.220.53; envelope-from=ard.biesheuvel@linaro.org; helo=mail-pa0-f53.google.com; Received: from mail-pa0-f53.google.com ([209.85.220.53]) by sog-mx-4.v43.ch3.sourceforge.com with esmtps (TLSv1:RC4-SHA:128) (Exim 4.76) id 1YLroV-0002W2-19 for edk2-devel@lists.sourceforge.net; Thu, 12 Feb 2015 11:20:07 +0000 Received: by mail-pa0-f53.google.com with SMTP id lf10so10757035pab.12 for ; Thu, 12 Feb 2015 03:20:01 -0800 (PST) X-Received: by 10.66.120.236 with SMTP id lf12mr5573587pab.67.1423740001342; Thu, 12 Feb 2015 03:20:01 -0800 (PST) Received: from ards-macbook-pro.local ([210.177.145.249]) by mx.google.com with ESMTPSA id n4sm3554887pdl.12.2015.02.12.03.19.58 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 12 Feb 2015 03:20:00 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.sourceforge.net, olivier.martin@arm.com, lersek@redhat.com, roy.franz@linaro.org, leif.lindholm@linaro.org, stefano.stabellini@eu.citrix.com, ian.campbell@citrix.com, anthony.perard@citrix.com, xen-devel@lists.xen.org, julien.grall@linaro.org, jordan.l.justen@intel.com, michael.d.kinney@intel.com, feng.tian@intel.com Date: Thu, 12 Feb 2015 19:18:56 +0800 Message-Id: <1423739961-5945-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1423739961-5945-1-git-send-email-ard.biesheuvel@linaro.org> References: <1423739961-5945-1-git-send-email-ard.biesheuvel@linaro.org> X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_PASS SPF: sender matches SPF record X-Headers-End: 1YLroV-0002W2-19 Subject: [edk2] [PATCH v4 04/29] ArmVirtualizationPkg: add GICv3 detection to VirtFdtDxe X-BeenThere: edk2-devel@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list Reply-To: edk2-devel@lists.sourceforge.net List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.sourceforge.net X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This adds support for detecting the presence of a GICv3 interrupt controller from the device tree, and recording its distributor and redistributor base addresses in their respective PCDs. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin Acked-by: Laszlo Ersek Signed-off-by: Ard Biesheuvel --- ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.dsc | 1 + ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.c | 34 +++++++++++++++++++++++++++++++++- ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf | 1 + 3 files changed, 35 insertions(+), 1 deletion(-) diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.dsc b/ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.dsc index 32c8deb3b1d6..066108f66d28 100644 --- a/ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.dsc +++ b/ArmPlatformPkg/ArmVirtualizationPkg/ArmVirtualizationQemu.dsc @@ -172,6 +172,7 @@ # ARM General Interrupt Controller # gArmTokenSpaceGuid.PcdGicDistributorBase|0x0 + gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x0 gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x0 ## PL031 RealTimeClock diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.c b/ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.c index 1d44f9ba02b3..a12bd8686fcc 100644 --- a/ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.c +++ b/ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.c @@ -46,6 +46,7 @@ typedef enum { PropertyTypeTimer, PropertyTypePsci, PropertyTypeFwCfg, + PropertyTypeGicV3, } PROPERTY_TYPE; typedef struct { @@ -62,6 +63,7 @@ STATIC CONST PROPERTY CompatibleProperties[] = { { PropertyTypeTimer, "arm,armv8-timer" }, { PropertyTypePsci, "arm,psci-0.2" }, { PropertyTypeFwCfg, "qemu,fw-cfg-mmio" }, + { PropertyTypeGicV3, "arm,gic-v3" }, { PropertyTypeUnknown, "" } }; @@ -114,7 +116,7 @@ InitializeVirtFdtDxe ( VIRTIO_TRANSPORT_DEVICE_PATH *DevicePath; EFI_HANDLE Handle; UINT64 RegBase; - UINT64 DistBase, CpuBase; + UINT64 DistBase, CpuBase, RedistBase; CONST INTERRUPT_PROPERTY *InterruptProp; INT32 SecIntrNum, IntrNum, VirtIntrNum, HypIntrNum; CONST CHAR8 *PsciMethod; @@ -256,6 +258,36 @@ InitializeVirtFdtDxe ( DEBUG ((EFI_D_INFO, "Found GIC @ 0x%Lx/0x%Lx\n", DistBase, CpuBase)); break; + case PropertyTypeGicV3: + // + // The GIC v3 DT binding describes a series of at least 3 physical (base + // addresses, size) pairs: the distributor interface (GICD), at least one + // redistributor region (GICR) containing dedicated redistributor + // interfaces for all individual CPUs, and the CPU interface (GICC). + // Under virtualization, we assume that the first redistributor region + // listed covers the boot CPU. Also, our GICv3 driver only supports the + // system register CPU interface, so we can safely ignore the MMIO version + // which is listed after the sequence of redistributor interfaces. + // This means we are only interested in the first two memory regions + // supplied, and ignore everything else. + // + ASSERT (Len >= 32); + + // RegProp[0..1] == { GICD base, GICD size } + DistBase = fdt64_to_cpu (((UINT64 *)RegProp)[0]); + ASSERT (DistBase < MAX_UINT32); + + // RegProp[2..3] == { GICR base, GICR size } + RedistBase = fdt64_to_cpu (((UINT64 *)RegProp)[2]); + ASSERT (RedistBase < MAX_UINT32); + + PcdSet32 (PcdGicDistributorBase, (UINT32)DistBase); + PcdSet32 (PcdGicRedistributorsBase, (UINT32)RedistBase); + + DEBUG ((EFI_D_INFO, "Found GIC v3 (re)distributor @ 0x%Lx (0x%Lx)\n", + DistBase, RedistBase)); + break; + case PropertyTypeRtc: ASSERT (Len == 16); diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf b/ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf index 514ce2fdf658..1ed02b6f3750 100644 --- a/ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf +++ b/ArmPlatformPkg/ArmVirtualizationPkg/VirtFdtDxe/VirtFdtDxe.inf @@ -51,6 +51,7 @@ gArmVirtualizationTokenSpaceGuid.PcdFwCfgSelectorAddress gArmVirtualizationTokenSpaceGuid.PcdFwCfgDataAddress gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum gArmTokenSpaceGuid.PcdArmArchTimerIntrNum