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[50.57.142.19]) by mx.google.com with ESMTPS id rv4si697796vdb.98.2015.02.04.06.06.22 (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 04 Feb 2015 06:06:23 -0800 (PST) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YJ0ZE-0007Ds-P7; Wed, 04 Feb 2015 14:04:32 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1YJ0ZD-0007CT-Ar for xen-devel@lists.xen.org; Wed, 04 Feb 2015 14:04:31 +0000 Received: from [85.158.143.35] by server-3.bemta-4.messagelabs.com id C2/ED-02754-EE622D45; Wed, 04 Feb 2015 14:04:30 +0000 X-Env-Sender: parth.dixit@linaro.org X-Msg-Ref: server-14.tower-21.messagelabs.com!1423058668!12506790!1 X-Originating-IP: [209.85.192.172] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 6.13.4; banners=-,-,- X-VirusChecked: Checked Received: (qmail 20788 invoked from network); 4 Feb 2015 14:04:30 -0000 Received: from mail-pd0-f172.google.com (HELO mail-pd0-f172.google.com) (209.85.192.172) by server-14.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 4 Feb 2015 14:04:30 -0000 Received: by pdiy13 with SMTP id y13so880052pdi.8 for ; Wed, 04 Feb 2015 06:04:28 -0800 (PST) X-Received: by 10.66.234.40 with SMTP id ub8mr47812456pac.122.1423058668602; Wed, 04 Feb 2015 06:04:28 -0800 (PST) Received: from parthd-ubunutu.qualcomm.com ([202.46.23.62]) by mx.google.com with ESMTPSA id kg12sm2161881pbb.44.2015.02.04.06.04.23 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 04 Feb 2015 06:04:27 -0800 (PST) From: parth.dixit@linaro.org To: xen-devel@lists.xen.org Date: Wed, 4 Feb 2015 19:31:58 +0530 Message-Id: <1423058539-26403-15-git-send-email-parth.dixit@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1423058539-26403-1-git-send-email-parth.dixit@linaro.org> References: <1423058539-26403-1-git-send-email-parth.dixit@linaro.org> Cc: ian.campbell@citrix.com, Naresh Bhat , julien.grall@linaro.org, tim@xen.org, stefano.stabellini@citrix.com, Hanjun Guo , jbeulich@suse.com, christoffer.dall@linaro.org Subject: [Xen-devel] [PATCH RFC 14/35] ACPI / ACPICA: Add GTDT support updated by ACPI 5.1 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: parth.dixit@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: From: Naresh Bhat With ACPI 5.0, we got per-processor timer support in GTDT, and ACPI 5.1 introduced the support for platform (memory-mapped) timers: GT Block and SBSA watchdog timer, add the code needed in this patch. Signed-off-by: Hanjun Guo Signed-off-by: Naresh Bhat --- xen/include/acpi/actbl3.h | 90 ++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 77 insertions(+), 13 deletions(-) diff --git a/xen/include/acpi/actbl3.h b/xen/include/acpi/actbl3.h index 8c61b5f..0d1ff52 100644 --- a/xen/include/acpi/actbl3.h +++ b/xen/include/acpi/actbl3.h @@ -241,34 +241,98 @@ struct acpi_s3pt_suspend { /******************************************************************************* * - * GTDT - Generic Timer Description Table (ACPI 5.0) + * GTDT - Generic Timer Description Table (ACPI 5.1) * Version 1 * ******************************************************************************/ struct acpi_table_gtdt { struct acpi_table_header header; /* Common ACPI table header */ - u64 address; - u32 flags; - u32 secure_pl1_interrupt; - u32 secure_pl1_flags; - u32 non_secure_pl1_interrupt; - u32 non_secure_pl1_flags; + u64 cnt_control_base_address; + u32 reserved; + u32 secure_el1_interrupt; + u32 secure_el1_flags; + u32 non_secure_el1_interrupt; + u32 non_secure_el1_flags; u32 virtual_timer_interrupt; u32 virtual_timer_flags; - u32 non_secure_pl2_interrupt; - u32 non_secure_pl2_flags; + u32 non_secure_el2_interrupt; + u32 non_secure_el2_flags; + u64 cnt_read_base_address; + u32 platform_timer_count; + u32 platform_timer_offset; }; -/* Values for Flags field above */ - -#define ACPI_GTDT_MAPPED_BLOCK_PRESENT 1 - /* Values for all "TimerFlags" fields above */ #define ACPI_GTDT_INTERRUPT_MODE 1 #define ACPI_GTDT_INTERRUPT_POLARITY 2 +#define ACPI_GTDT_ALWAYS_ON 4 + +/* Values for GTDT subtable type in struct acpi_subtable_header */ + +enum acpi_gtdt_type { + ACPI_GTDT_TYPE_GT_BLOCK = 0, /* memory-mapped generic timer */ + ACPI_GTDT_TYPE_SBSA_GENERIC_WATCHDOG = 1, + ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ +}; + +/* + * GTDT Subtables, correspond to Type in struct acpi_subtable_header + */ + +/* 0: Generic Timer Block */ + +struct acpi_gtdt_gt_block { + struct acpi_subtable_header header; + u16 reserved; + u64 gt_block_address; + u32 gt_block_timer_count; /* must be less than or equal to 8 */ + u32 gt_block_timer_offset; +}; + +/* GT Block Timer Structure */ + +struct acpi_gt_block_timer { + u8 gt_frame_number; + u8 reseved[3]; + u64 cnt_base_address; + u64 cnt_el0_base_adress; + u32 physical_timer_interrupt; + u32 physical_timer_flags; + u32 vitual_timer_interrupt; + u32 vitual_timer_flags; + u32 timer_common_flags; +}; + +/* Flag Definitions: GT Block Physical Timers and Virtual timers */ + +#define ACPI_GT_BLOCK_INTERRUPT_MODE 1 +#define ACPI_GT_BLOCK_INTERRUPT_POLARITY 2 + +/* Flag Definitions: Common Flags */ + +#define ACPI_GT_BLOCK_IS_SECURE_TIMER 1 +#define ACPI_GT_BLOCK_ALWAYS_ON 2 + +/* 1: SBSA Generic Watchdog Structure */ + +struct acpi_sbsa_generic_watchdog { + struct acpi_subtable_header header; + u16 reserved; + u64 refresh_frame_address; + u64 control_frame_address; + u32 interrupt; + u32 flags; +}; + +/* Flag Definitions: SBSA Generic Watchdog */ + +#define ACPI_SBSA_WATCHDOG_INTERRUPT_MODE 1 +#define ACPI_SBSA_WATCHDOG_INTERRUPT_POLARITY 2 +#define ACPI_SBSA_WATCHDOG_IS_SECURE_TIMER 4 + /******************************************************************************* * * MPST - Memory Power State Table (ACPI 5.0)