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[50.57.142.19]) by mx.google.com with ESMTPS id lp18si2693771vdb.77.2014.11.05.01.42.52 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 05 Nov 2014 01:42:52 -0800 (PST) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xlx6n-0007TB-D5; Wed, 05 Nov 2014 09:42:33 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1Xlx6m-0007SX-At for xen-devel@lists.xen.org; Wed, 05 Nov 2014 09:42:32 +0000 Received: from [85.158.143.35] by server-1.bemta-4.messagelabs.com id 75/E3-09842-701F9545; Wed, 05 Nov 2014 09:42:31 +0000 X-Env-Sender: frediano.ziglio@huawei.com X-Msg-Ref: server-3.tower-21.messagelabs.com!1415180547!12323028!1 X-Originating-IP: [119.145.14.65] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NSA9PiA3NzQ2Mw==\n X-StarScan-Received: X-StarScan-Version: 6.12.4; banners=-,-,- X-VirusChecked: Checked Received: (qmail 17706 invoked from network); 5 Nov 2014 09:42:30 -0000 Received: from szxga02-in.huawei.com (HELO szxga02-in.huawei.com) (119.145.14.65) by server-3.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 5 Nov 2014 09:42:30 -0000 Received: from 172.24.2.119 (EHLO szxeml450-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CBW70510; Wed, 05 Nov 2014 17:42:26 +0800 (CST) Received: from localhost.localdomain (10.47.71.64) by szxeml450-hub.china.huawei.com (10.82.67.193) with Microsoft SMTP Server id 14.3.158.1; Wed, 5 Nov 2014 17:42:18 +0800 From: Frediano Ziglio To: Ian Campbell , Stefano Stabellini , Tim Deegan , Julien Grall , Date: Wed, 5 Nov 2014 09:41:11 +0000 Message-ID: <1415180475-8339-5-git-send-email-frediano.ziglio@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1415180475-8339-1-git-send-email-frediano.ziglio@huawei.com> References: <1415180475-8339-1-git-send-email-frediano.ziglio@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.71.64] X-CFilter-Loop: Reflected Cc: zoltan.kiss@huawei.com, xen-devel@lists.xen.org Subject: [Xen-devel] [PATCH v3 4/8] xen/arm: Add support for DTBs with strange names of Hip04 GICv2 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: frediano.ziglio@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: This name can appear in some Linux kernel repos. Not very fortunate, but to avoid others spending an hour to spot that few characters difference it worth to work around it. Signed-off-by: Zoltan Kiss --- xen/arch/arm/gic-v2.c | 1 + xen/include/asm-arm/gic.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 3cb59dd..9ab30ce 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -823,6 +823,7 @@ DT_DEVICE_END static const char * const hip04_gicv2_dt_compat[] __initconst = { DT_COMPAT_GIC_HIP04, + DT_COMPAT_GIC_HIP04_2, NULL }; diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 5adb628..3d2b3db 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -156,11 +156,13 @@ #define DT_COMPAT_GIC_CORTEX_A15 "arm,cortex-a15-gic" #define DT_COMPAT_GIC_CORTEX_A7 "arm,cortex-a7-gic" #define DT_COMPAT_GIC_HIP04 "hisilicon,hip04-gic" +#define DT_COMPAT_GIC_HIP04_2 "hisilicon,hip04-intc" #define DT_MATCH_GIC_V2 DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_CORTEX_A15), \ DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_CORTEX_A7), \ DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_400), \ - DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_HIP04) + DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_HIP04), \ + DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_HIP04_2) #define DT_COMPAT_GIC_V3 "arm,gic-v3"