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[50.57.142.19]) by mx.google.com with ESMTPS id z68si30364760qgd.46.2014.11.03.08.49.06 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 03 Nov 2014 08:49:06 -0800 (PST) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XlKnA-0000aL-SB; Mon, 03 Nov 2014 16:47:44 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XlKn9-0000Yf-M4 for xen-devel@lists.xen.org; Mon, 03 Nov 2014 16:47:43 +0000 Received: from [85.158.137.68] by server-15.bemta-3.messagelabs.com id 04/E3-17735-EA1B7545; Mon, 03 Nov 2014 16:47:42 +0000 X-Env-Sender: frediano.ziglio@huawei.com X-Msg-Ref: server-2.tower-31.messagelabs.com!1415033258!11339363!1 X-Originating-IP: [119.145.14.64] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NCA9PiA4MDE5MQ==\n X-StarScan-Received: X-StarScan-Version: 6.12.4; banners=-,-,- X-VirusChecked: Checked Received: (qmail 11672 invoked from network); 3 Nov 2014 16:47:42 -0000 Received: from szxga01-in.huawei.com (HELO szxga01-in.huawei.com) (119.145.14.64) by server-2.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 3 Nov 2014 16:47:42 -0000 Received: from 172.24.2.119 (EHLO szxeml424-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CDW69208; Tue, 04 Nov 2014 00:47:37 +0800 (CST) Received: from localhost.localdomain (10.47.77.41) by szxeml424-hub.china.huawei.com (10.82.67.163) with Microsoft SMTP Server id 14.3.158.1; Tue, 4 Nov 2014 00:47:31 +0800 From: Frediano Ziglio To: Ian Campbell , Stefano Stabellini , Tim Deegan , Julien Grall , Date: Mon, 3 Nov 2014 16:46:36 +0000 Message-ID: <1415033196-30529-8-git-send-email-frediano.ziglio@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1415033196-30529-1-git-send-email-frediano.ziglio@huawei.com> References: <1415033196-30529-1-git-send-email-frediano.ziglio@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.77.41] X-CFilter-Loop: Reflected Cc: zoltan.kiss@huawei.com, xen-devel@lists.xen.org Subject: [Xen-devel] [PATCH v2 7/7] xen/arm: Move vGIC registers on Hip04 platform X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: frediano.ziglio@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.47 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Signed-off-by: Frediano Ziglio Signed-off-by: Zoltan Kiss --- xen/arch/arm/gic-v2.c | 15 +++++++++++++-- xen/include/asm-arm/gic.h | 2 ++ 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index cea9edc..eb8cc19 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -669,8 +669,19 @@ static int gicv2_make_dt_node(const struct domain *d, return -FDT_ERR_XEN(ENOMEM); tmp = new_cells; - dt_set_range(&tmp, node, d->arch.vgic.dbase, PAGE_SIZE); - dt_set_range(&tmp, node, d->arch.vgic.cbase, PAGE_SIZE * 2); + + if ( nr_gic_cpu_if == 16 ) + { + dt_set_range(&tmp, node, d->arch.vgic.dbase - HIP04_VGIC_REG_OFFSET, + PAGE_SIZE); + dt_set_range(&tmp, node, d->arch.vgic.cbase - HIP04_VGIC_REG_OFFSET, + PAGE_SIZE * 2); + } + else + { + dt_set_range(&tmp, node, d->arch.vgic.dbase, PAGE_SIZE); + dt_set_range(&tmp, node, d->arch.vgic.cbase, PAGE_SIZE * 2); + } res = fdt_property(fdt, "reg", new_cells, len); xfree(new_cells); diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 3d2b3db..5af8201 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -147,6 +147,8 @@ #define GICH_LR_PENDING 1 #define GICH_LR_ACTIVE 2 +#define HIP04_VGIC_REG_OFFSET 0xe0000000 + #ifndef __ASSEMBLY__ #include #include