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[50.57.142.19]) by mx.google.com with ESMTPS id t46si13046174qgt.120.2014.11.03.08.49.18 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 03 Nov 2014 08:49:18 -0800 (PST) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XlKn0-0000S8-Hh; Mon, 03 Nov 2014 16:47:34 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XlKmz-0000Ra-OP for xen-devel@lists.xen.org; Mon, 03 Nov 2014 16:47:33 +0000 Received: from [85.158.137.68] by server-10.bemta-3.messagelabs.com id EA/31-24859-5A1B7545; Mon, 03 Nov 2014 16:47:33 +0000 X-Env-Sender: frediano.ziglio@huawei.com X-Msg-Ref: server-2.tower-31.messagelabs.com!1415033248!11339312!1 X-Originating-IP: [119.145.14.66] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NiA9PiA4NTI3\n X-StarScan-Received: X-StarScan-Version: 6.12.4; banners=-,-,- X-VirusChecked: Checked Received: (qmail 10824 invoked from network); 3 Nov 2014 16:47:32 -0000 Received: from szxga03-in.huawei.com (HELO szxga03-in.huawei.com) (119.145.14.66) by server-2.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 3 Nov 2014 16:47:32 -0000 Received: from 172.24.2.119 (EHLO szxeml424-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id AWO48423; Tue, 04 Nov 2014 00:47:27 +0800 (CST) Received: from localhost.localdomain (10.47.77.41) by szxeml424-hub.china.huawei.com (10.82.67.163) with Microsoft SMTP Server id 14.3.158.1; Tue, 4 Nov 2014 00:47:20 +0800 From: Frediano Ziglio To: Ian Campbell , Stefano Stabellini , Tim Deegan , Julien Grall , Date: Mon, 3 Nov 2014 16:46:33 +0000 Message-ID: <1415033196-30529-5-git-send-email-frediano.ziglio@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1415033196-30529-1-git-send-email-frediano.ziglio@huawei.com> References: <1415033196-30529-1-git-send-email-frediano.ziglio@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.77.41] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020208.5457B19F.0369, ss=1, re=0.001, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 47021c4164a1ad619f6f38c52f9197ca Cc: zoltan.kiss@huawei.com, xen-devel@lists.xen.org Subject: [Xen-devel] [PATCH v2 4/7] xen/arm: Add support for DTBs with strange names of Hip04 GICv2 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: frediano.ziglio@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: This name can appear in some Linux kernel repos. Not very fortunate, but to avoid others spending an hour to spot that few characters difference it worth to work around it. Signed-off-by: Zoltan Kiss --- xen/arch/arm/gic-v2.c | 1 + xen/include/asm-arm/gic.h | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 9461fe3..04e1850 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -829,6 +829,7 @@ DT_DEVICE_END static const char * const hip04_gicv2_dt_compat[] __initconst = { DT_COMPAT_GIC_HIP04, + DT_COMPAT_GIC_HIP04_2, NULL }; diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 5adb628..3d2b3db 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -156,11 +156,13 @@ #define DT_COMPAT_GIC_CORTEX_A15 "arm,cortex-a15-gic" #define DT_COMPAT_GIC_CORTEX_A7 "arm,cortex-a7-gic" #define DT_COMPAT_GIC_HIP04 "hisilicon,hip04-gic" +#define DT_COMPAT_GIC_HIP04_2 "hisilicon,hip04-intc" #define DT_MATCH_GIC_V2 DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_CORTEX_A15), \ DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_CORTEX_A7), \ DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_400), \ - DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_HIP04) + DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_HIP04), \ + DT_MATCH_COMPATIBLE(DT_COMPAT_GIC_HIP04_2) #define DT_COMPAT_GIC_V3 "arm,gic-v3"