From patchwork Wed Aug 13 16:29:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefano Stabellini X-Patchwork-Id: 35379 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f69.google.com (mail-oa0-f69.google.com [209.85.219.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id D093520DCC for ; Wed, 13 Aug 2014 16:32:59 +0000 (UTC) Received: by mail-oa0-f69.google.com with SMTP id i7sf54517592oag.8 for ; Wed, 13 Aug 2014 09:32:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:date:message-id:in-reply-to :references:mime-version:cc:subject:precedence:list-id :list-unsubscribe:list-post:list-help:list-subscribe:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:list-archive:content-type:content-transfer-encoding; bh=PsqZDd8PC44Y4Dr8YxMpg/fadtboECu/pMvHmQuNFY8=; b=hdTJmE/bQidK/FLt8CtUO+4cBjm1G18uTwBpbQ2nDqMKQQfNwQboiFICopUcpKb2Pt CH4TVWq4Z1q5t8E4chZyB98WHxNK8JQkKTCBy1+lYCgBRAG+B+YW7kns7goHasBuGOSC LhTAg8AHpWssDhFALzYO7pEa7c8W4nXrPhMjPbSVOCANdItUiv+MDyQci6Av5wnHvJyp 1nJPlz32v1IjI/fUB60U63shxaemgyJ41ROkjguZJIohBgumAyTr9mrlgLyzXT+4E8dz FISdq5Z3YA2w3gP8Ts7pHmqLejKMWzq/nUmk+pmvqpfb/mbdP+DMm/UogjLhMbA0th4S fBfw== X-Gm-Message-State: ALoCoQmVPgKBFlOmcTPaCCz+mNJUw0LJgw6mLbMjOngjYter4UkoyxIf4kwfo8/FucxGewtxsF4/ X-Received: by 10.50.117.10 with SMTP id ka10mr3434704igb.1.1407947579450; Wed, 13 Aug 2014 09:32:59 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.29.137 with SMTP id b9ls691310qgb.75.gmail; Wed, 13 Aug 2014 09:32:59 -0700 (PDT) X-Received: by 10.52.51.203 with SMTP id m11mr1559941vdo.72.1407947579352; Wed, 13 Aug 2014 09:32:59 -0700 (PDT) Received: from mail-vc0-f172.google.com (mail-vc0-f172.google.com [209.85.220.172]) by mx.google.com with ESMTPS id s2si1417262vco.17.2014.08.13.09.32.59 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 13 Aug 2014 09:32:59 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) client-ip=209.85.220.172; Received: by mail-vc0-f172.google.com with SMTP id im17so15307207vcb.31 for ; Wed, 13 Aug 2014 09:32:59 -0700 (PDT) X-Received: by 10.52.120.51 with SMTP id kz19mr1429392vdb.95.1407947579270; Wed, 13 Aug 2014 09:32:59 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp344327vcb; Wed, 13 Aug 2014 09:32:58 -0700 (PDT) X-Received: by 10.43.79.135 with SMTP id zq7mr7739726icb.33.1407947577143; Wed, 13 Aug 2014 09:32:57 -0700 (PDT) Received: from lists.xen.org (lists.xen.org. [50.57.142.19]) by mx.google.com with ESMTPS id c3si4893503igv.49.2014.08.13.09.32.56 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 13 Aug 2014 09:32:57 -0700 (PDT) Received-SPF: none (google.com: xen-devel-bounces@lists.xen.org does not designate permitted sender hosts) client-ip=50.57.142.19; Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XHbSc-0003kO-OV; Wed, 13 Aug 2014 16:31:38 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XHbSb-0003iQ-Hv for xen-devel@lists.xensource.com; Wed, 13 Aug 2014 16:31:37 +0000 Received: from [85.158.139.211:55495] by server-3.bemta-5.messagelabs.com id DE/EE-13873-8E29BE35; Wed, 13 Aug 2014 16:31:36 +0000 X-Env-Sender: Stefano.Stabellini@citrix.com X-Msg-Ref: server-10.tower-206.messagelabs.com!1407947470!5875052!2 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n X-StarScan-Received: X-StarScan-Version: 6.12.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 6424 invoked from network); 13 Aug 2014 16:31:14 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-10.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 13 Aug 2014 16:31:14 -0000 X-IronPort-AV: E=Sophos;i="5.01,857,1400025600"; d="scan'208";a="162042036" Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.79) with Microsoft SMTP Server id 14.3.181.6; Wed, 13 Aug 2014 12:31:09 -0400 Received: from kaball.uk.xensource.com ([10.80.2.59]) by ukmail1.uk.xensource.com with esmtp (Exim 4.69) (envelope-from ) id 1XHbS4-00059X-3u; Wed, 13 Aug 2014 17:31:04 +0100 From: Stefano Stabellini To: Date: Wed, 13 Aug 2014 17:29:42 +0100 Message-ID: <1407947384-24279-8-git-send-email-stefano.stabellini@eu.citrix.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 X-DLP: MIA1 Cc: julien.grall@citrix.com, Ian.Campbell@citrix.com, Stefano Stabellini Subject: [Xen-devel] [PATCH v12 08/10] xen/arm: take the rank lock before accessing ipriority X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: List-Unsubscribe: , List-Post: , List-Help: , List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: stefano.stabellini@eu.citrix.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Archive: Currently we read ipriority from vgic_vcpu_inject_irq without taking the rank lock. Fix that by taking the rank lock and reading ipriority at the beginning of the function. As vgic_vcpu_inject_irq is called from the irq.c upon receiving an interrupt, we need to change the implementation of vgic_lock/unlock_rank to spin_lock_irqsave to make it safe in irq context. Signed-off-by: Stefano Stabellini Acked-by: Julien Grall --- Changes in v9: - add explicit flags paramter to vgic_lock_rank and vgic_unlock_rank. Changes in v2: - rebased on ab78724fc5628318b172b4344f7280621a151e1b; - remove warning on changing priority of active irqs. --- xen/arch/arm/vgic-v2.c | 74 +++++++++++++++++++++++--------------------- xen/arch/arm/vgic.c | 11 ++++--- xen/include/asm-arm/vgic.h | 4 +-- 3 files changed, 47 insertions(+), 42 deletions(-) diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 39d8272..f57dbf9 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -39,6 +39,7 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info) register_t *r = select_user_reg(regs, dabt.reg); struct vgic_irq_rank *rank; int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase); + unsigned long flags; switch ( gicd_reg ) { @@ -77,54 +78,54 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info) if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ISENABLER, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = rank->ienable; - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ICENABLER ... GICD_ICENABLERN: if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ICENABLER, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = rank->ienable; - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ISPENDR ... GICD_ISPENDRN: if ( dabt.size != DABT_BYTE && dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ISPENDR, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = vgic_byte_read(rank->ipend, dabt.sign, gicd_reg); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ICPENDR ... GICD_ICPENDRN: if ( dabt.size != DABT_BYTE && dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ICPENDR, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = vgic_byte_read(rank->ipend, dabt.sign, gicd_reg); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ISACTIVER ... GICD_ISACTIVERN: if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ISACTIVER, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = rank->iactive; - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ICACTIVER ... GICD_ICACTIVERN: if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ICACTIVER, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = rank->iactive; - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ITARGETSR ... GICD_ITARGETSRN: @@ -132,12 +133,12 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info) rank = vgic_rank_offset(v, 8, gicd_reg - GICD_ITARGETSR, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = rank->itargets[REG_RANK_INDEX(8, gicd_reg - GICD_ITARGETSR, DABT_WORD)]; if ( dabt.size == DABT_BYTE ) *r = vgic_byte_read(*r, dabt.sign, gicd_reg); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_IPRIORITYR ... GICD_IPRIORITYRN: @@ -145,21 +146,21 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info) rank = vgic_rank_offset(v, 8, gicd_reg - GICD_IPRIORITYR, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = rank->ipriority[REG_RANK_INDEX(8, gicd_reg - GICD_IPRIORITYR, DABT_WORD)]; if ( dabt.size == DABT_BYTE ) *r = vgic_byte_read(*r, dabt.sign, gicd_reg); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ICFGR ... GICD_ICFGRN: if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 2, gicd_reg - GICD_ICFGR, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = rank->icfg[REG_RANK_INDEX(2, gicd_reg - GICD_ICFGR, DABT_WORD)]; - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_NSACR ... GICD_NSACRN: @@ -176,18 +177,18 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info) if ( dabt.size != DABT_BYTE && dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_CPENDSGIR, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = vgic_byte_read(rank->pendsgi, dabt.sign, gicd_reg); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_SPENDSGIR ... GICD_SPENDSGIRN: if ( dabt.size != DABT_BYTE && dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_SPENDSGIR, DABT_WORD); if ( rank == NULL) goto read_as_zero; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); *r = vgic_byte_read(rank->pendsgi, dabt.sign, gicd_reg); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; /* Implementation defined -- read as zero */ @@ -269,6 +270,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) struct vgic_irq_rank *rank; int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase); uint32_t tr; + unsigned long flags; switch ( gicd_reg ) { @@ -295,7 +297,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ISENABLER, DABT_WORD); if ( rank == NULL) goto write_ignore; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); tr = rank->ienable; rank->ienable |= *r; /* The virtual irq is derived from register offset. @@ -303,14 +305,14 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) * to get Virtual irq number */ vgic_enable_irqs(v, (*r) & (~tr), (gicd_reg - GICD_ISENABLER) >> DABT_WORD); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ICENABLER ... GICD_ICENABLERN: if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ICENABLER, DABT_WORD); if ( rank == NULL) goto write_ignore; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); tr = rank->ienable; rank->ienable &= ~*r; /* The virtual irq is derived from register offset. @@ -318,7 +320,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) * to get Virtual irq number */ vgic_disable_irqs(v, (*r) & tr, (gicd_reg - GICD_ICENABLER) >> DABT_WORD); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ISPENDR ... GICD_ISPENDRN: @@ -337,18 +339,18 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ISACTIVER, DABT_WORD); if ( rank == NULL) goto write_ignore; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); rank->iactive &= ~*r; - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ICACTIVER ... GICD_ICACTIVERN: if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 1, gicd_reg - GICD_ICACTIVER, DABT_WORD); if ( rank == NULL) goto write_ignore; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); rank->iactive &= ~*r; - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ITARGETSR ... GICD_ITARGETSR + 7: @@ -379,7 +381,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) !((target & 0xff) && (target & (0xff << 8)) && (target & (0xff << 16)) && (target & (0xff << 24)))) goto write_ignore; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); i = 0; while ( (i = find_next_bit(&target, 32, i)) < 32 ) { @@ -407,7 +409,7 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) else vgic_byte_write(&rank->itargets[REG_RANK_INDEX(8, gicd_reg - GICD_ITARGETSR, DABT_WORD)], target, gicd_reg); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; } @@ -415,14 +417,14 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) if ( dabt.size != DABT_BYTE && dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 8, gicd_reg - GICD_IPRIORITYR, DABT_WORD); if ( rank == NULL) goto write_ignore; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); if ( dabt.size == DABT_WORD ) rank->ipriority[REG_RANK_INDEX(8, gicd_reg - GICD_IPRIORITYR, DABT_WORD)] = *r; else vgic_byte_write(&rank->ipriority[REG_RANK_INDEX(8, gicd_reg - GICD_IPRIORITYR, DABT_WORD)], *r, gicd_reg); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_ICFGR: /* SGIs */ @@ -434,9 +436,9 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info) if ( dabt.size != DABT_WORD ) goto bad_width; rank = vgic_rank_offset(v, 2, gicd_reg - GICD_ICFGR, DABT_WORD); if ( rank == NULL) goto write_ignore; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); rank->icfg[REG_RANK_INDEX(2, gicd_reg - GICD_ICFGR, DABT_WORD)] = *r; - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return 1; case GICD_NSACR ... GICD_NSACRN: diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 3cf5e7b..17b3b6d 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -158,10 +158,11 @@ struct vcpu *vgic_get_target_vcpu(struct vcpu *v, unsigned int irq) struct domain *d = v->domain; struct vcpu *v_target; struct vgic_irq_rank *rank = vgic_rank_irq(v, irq); + unsigned long flags; - vgic_lock_rank(v, rank); + vgic_lock_rank(v, rank, flags); v_target = d->arch.vgic.handler->get_target_vcpu(v, irq); - vgic_unlock_rank(v, rank); + vgic_unlock_rank(v, rank, flags); return v_target; } @@ -368,6 +369,10 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq) unsigned long flags; bool_t running; + vgic_lock_rank(v, rank, flags); + priority = vgic_byte_read(rank->ipriority[REG_RANK_INDEX(8, irq, DABT_WORD)], 0, irq & 0x3); + vgic_unlock_rank(v, rank, flags); + spin_lock_irqsave(&v->arch.vgic.lock, flags); /* vcpu offline */ @@ -385,8 +390,6 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq) goto out; } - priority = vgic_byte_read(rank->ipriority[REG_RANK_INDEX(8, irq, DABT_WORD)], 0, irq & 0x3); - n->irq = irq; n->priority = priority; diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h index 9b1db04..338ba03 100644 --- a/xen/include/asm-arm/vgic.h +++ b/xen/include/asm-arm/vgic.h @@ -107,8 +107,8 @@ struct vgic_ops { #define vgic_lock(v) spin_lock_irq(&(v)->domain->arch.vgic.lock) #define vgic_unlock(v) spin_unlock_irq(&(v)->domain->arch.vgic.lock) -#define vgic_lock_rank(v, r) spin_lock(&(r)->lock) -#define vgic_unlock_rank(v, r) spin_unlock(&(r)->lock) +#define vgic_lock_rank(v, r, flags) spin_lock_irqsave(&(r)->lock, flags) +#define vgic_unlock_rank(v, r, flags) spin_unlock_irqrestore(&(r)->lock, flags) /* * Rank containing GICD_ for GICD_ with