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([185.25.64.249]) by mx.google.com with ESMTPSA id q5sm2409641wiz.3.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 26 Sep 2013 04:09:58 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: stefano.stabellini@eu.citrix.com, ian.campbell@citrix.com, patches@linaro.org, Julien Grall Subject: [PATCH v5 7/7] xen/arm: Use the hardware ID to boot correctly secondary cpus Date: Thu, 26 Sep 2013 12:09:41 +0100 Message-Id: <1380193781-17474-8-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1380193781-17474-1-git-send-email-julien.grall@linaro.org> References: <1380193781-17474-1-git-send-email-julien.grall@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.169 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Secondary CPUs will spin in head.S until their MPIDR[23:0] correspond to the smp_up_cpu. Actually Xen will set the value with the logical CPU ID which is wrong. Use the cpu_logical_map to get the correct CPU ID. Signed-off-by: Julien Grall --- Changes in v5: - Introduce a cpuid field in init_info to store the logical CPU ID Changes in v2: - Replace Acked-by by a s-o-b - s/TMP/to in commit title --- xen/arch/arm/smpboot.c | 13 ++++++++----- xen/include/asm-arm/init.h | 2 ++ 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 8ea4750..234748e 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -127,8 +127,7 @@ make_cpus_ready(unsigned int max_cpus, unsigned long boot_phys_offset) for ( i = 1; i < max_cpus; i++ ) { /* Tell the next CPU to get ready */ - /* TODO: handle boards where CPUIDs are not contiguous */ - *gate = i; + *gate = cpu_logical_map(i); flush_xen_dcache(*gate); isb(); sev(); @@ -142,11 +141,12 @@ make_cpus_ready(unsigned int max_cpus, unsigned long boot_phys_offset) /* Boot the current CPU */ void __cpuinit start_secondary(unsigned long boot_phys_offset, unsigned long fdt_paddr, - unsigned long cpuid) + unsigned long hwid) { + unsigned int cpuid = init_data.cpuid; + memset(get_cpu_info(), 0, sizeof (struct cpu_info)); - /* TODO: handle boards where CPUIDs are not contiguous */ set_processor_id(cpuid); current_cpu_data = boot_cpu_data; @@ -233,9 +233,12 @@ int __cpu_up(unsigned int cpu) /* Tell the remote CPU which stack to boot on. */ init_data.stack = idle_vcpu[cpu]->arch.stack; + /* Tell the remote CPU what is it's logical CPU ID */ + init_data.cpuid = cpu; + /* Unblock the CPU. It should be waiting in the loop in head.S * for an event to arrive when smp_up_cpu matches its cpuid. */ - smp_up_cpu = cpu; + smp_up_cpu = cpu_logical_map(cpu); /* we need to make sure that the change to smp_up_cpu is visible to * secondary cpus with D-cache off */ flush_xen_dcache(smp_up_cpu); diff --git a/xen/include/asm-arm/init.h b/xen/include/asm-arm/init.h index 7a07136..5ac8cf8 100644 --- a/xen/include/asm-arm/init.h +++ b/xen/include/asm-arm/init.h @@ -5,6 +5,8 @@ struct init_info { /* Pointer to the stack, used by head.S when entering in C */ unsigned char *stack; + /* Logical CPU ID, used by start_secondary */ + unsigned int cpuid; }; #endif /* _XEN_ASM_INIT_H */