From patchwork Wed Sep 18 13:15:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 20438 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qc0-f200.google.com (mail-qc0-f200.google.com [209.85.216.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 68BC526114 for ; Wed, 18 Sep 2013 13:15:37 +0000 (UTC) Received: by mail-qc0-f200.google.com with SMTP id x20sf7199362qcv.3 for ; Wed, 18 Sep 2013 06:15:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=RFZ8F3BtLg4ckUzbSEhmxO2hy8hjQ87z50YwZNGekHA=; b=GWtieqY7gpF52GwFPj6xUWPqfpFzU9PxPjOr94LaoE+XSV0wgnWL/xEs2uNYypZr4u p/uSAAFzSxRNNUo0jIVG9P8gUlMRHlbbDwkAUXKGrZXw6nRiWjdzWkg73DWDVClWGxny UJQm429jZsSj3b5SQw5eMw2l5VDGsRFJYXvqfMG89seAMYR2wxxR91FGKfmFP30n+O43 wEa6E+6t2Ag3D/5hqi837m8zHGNpQFk6dswq1YvPI+DNR/Cfp9gjs+TAzEoseQytL71m o4ZQIue1CiE+P/I7M9OtvhSXYovRRPgkkECl3gNejNiZxOJoDoaKS0EIgOzP4SymCWNB TSwg== X-Gm-Message-State: ALoCoQnodoDN65SmtjBa8KFVSM6mWltQ6zz+Z9S8er2pROQTUd2eI90wvuAntet7zPiXA4NpET1i X-Received: by 10.59.4.102 with SMTP id cd6mr2552034ved.23.1379510137246; Wed, 18 Sep 2013 06:15:37 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.39.163 with SMTP id q3ls3298572qek.31.gmail; Wed, 18 Sep 2013 06:15:37 -0700 (PDT) X-Received: by 10.220.249.67 with SMTP id mj3mr2016036vcb.23.1379510137152; Wed, 18 Sep 2013 06:15:37 -0700 (PDT) Received: from mail-vc0-f170.google.com (mail-vc0-f170.google.com [209.85.220.170]) by mx.google.com with ESMTPS id bl10si518157vcb.9.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 18 Sep 2013 06:15:37 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.170 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.170; Received: by mail-vc0-f170.google.com with SMTP id kw10so5451327vcb.1 for ; Wed, 18 Sep 2013 06:15:37 -0700 (PDT) X-Received: by 10.58.161.116 with SMTP id xr20mr37665049veb.2.1379510137034; Wed, 18 Sep 2013 06:15:37 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp217413vcz; Wed, 18 Sep 2013 06:15:36 -0700 (PDT) X-Received: by 10.14.42.3 with SMTP id i3mr722425eeb.95.1379510132681; Wed, 18 Sep 2013 06:15:32 -0700 (PDT) Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by mx.google.com with ESMTPS id z8si1766290eee.203.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 18 Sep 2013 06:15:32 -0700 (PDT) Received-SPF: neutral (google.com: 74.125.83.49 is neither permitted nor denied by best guess record for domain of julien.grall@linaro.org) client-ip=74.125.83.49; Received: by mail-ee0-f49.google.com with SMTP id d41so3451317eek.36 for ; Wed, 18 Sep 2013 06:15:32 -0700 (PDT) X-Received: by 10.14.204.195 with SMTP id h43mr716006eeo.111.1379510132136; Wed, 18 Sep 2013 06:15:32 -0700 (PDT) Received: from belegaer.uk.xensource.com. ([185.25.64.249]) by mx.google.com with ESMTPSA id n48sm2689190eeg.17.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 18 Sep 2013 06:15:31 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: stefano.stabellini@eu.citrix.com, ian.campbell@citrix.com, patches@linaro.org, Julien Grall Subject: [PATCH v3 6/6] xen/arm: Use the hardware ID to boot correctly secondary cpus Date: Wed, 18 Sep 2013 14:15:22 +0100 Message-Id: <1379510122-9467-7-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1379510122-9467-1-git-send-email-julien.grall@linaro.org> References: <1379510122-9467-1-git-send-email-julien.grall@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.170 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Secondary CPUs will spin in head.S until their MPIDR[23:0] correspond to the smp_up_cpu. Actually Xen will set the value with the logical CPU ID which is wrong. Use the cpu_logical_map to get the correct CPU ID. Signed-off-by: Julien Grall --- Changes in v2: - Replace Acked-by by a s-o-b - s/TMP/to in commit title --- xen/arch/arm/smpboot.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index c0d25de..1952287 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -124,8 +124,7 @@ make_cpus_ready(unsigned int max_cpus, unsigned long boot_phys_offset) for ( i = 1; i < max_cpus; i++ ) { /* Tell the next CPU to get ready */ - /* TODO: handle boards where CPUIDs are not contiguous */ - *gate = i; + *gate = cpu_logical_map(i); flush_xen_dcache(*gate); isb(); sev(); @@ -139,11 +138,22 @@ make_cpus_ready(unsigned int max_cpus, unsigned long boot_phys_offset) /* Boot the current CPU */ void __cpuinit start_secondary(unsigned long boot_phys_offset, unsigned long fdt_paddr, - unsigned long cpuid) + unsigned long hwid) { + unsigned int cpuid; + memset(get_cpu_info(), 0, sizeof (struct cpu_info)); - /* TODO: handle boards where CPUIDs are not contiguous */ + /* Browse the logical map and find the associate logical cpu ID */ + for ( cpuid = 1; cpuid < nr_cpu_ids; cpuid++ ) + { + if ( cpu_logical_map(cpuid) == hwid ) + break; + } + + if ( cpuid == nr_cpu_ids ) + panic("Can't find logical CPU id for cpu MPIDR[23:0] = 0x%lx\n", hwid); + set_processor_id(cpuid); current_cpu_data = boot_cpu_data; @@ -232,7 +242,7 @@ int __cpu_up(unsigned int cpu) /* Unblock the CPU. It should be waiting in the loop in head.S * for an event to arrive when smp_up_cpu matches its cpuid. */ - smp_up_cpu = cpu; + smp_up_cpu = cpu_logical_map(cpu); /* we need to make sure that the change to smp_up_cpu is visible to * secondary cpus with D-cache off */ flush_xen_dcache(smp_up_cpu);