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([185.25.64.249]) by mx.google.com with ESMTPSA id o9sm4306202wiz.1.1969.12.31.16.00.00 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 30 Aug 2013 06:30:51 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: stefano.stabellini@eu.citrix.com, ian.campbell@citrix.com, patches@linaro.org, Julien Grall Subject: [PATCH 7/7] xen/arm: Use the hardware ID TMP boot correctly secondary cpus Date: Fri, 30 Aug 2013 14:30:33 +0100 Message-Id: <1377869433-15385-8-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1377869433-15385-1-git-send-email-julien.grall@linaro.org> References: <1377869433-15385-1-git-send-email-julien.grall@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Secondary CPUs will spin in head.S until their MPIDR[23:0] correspond to the smp_up_cpu. Actually Xen will set the value with the logical CPU ID which is wrong. Use the cpu_logical_map to get the correct CPU ID. Acked-by: Julien Grall --- xen/arch/arm/smpboot.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index c0d25de..1952287 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -124,8 +124,7 @@ make_cpus_ready(unsigned int max_cpus, unsigned long boot_phys_offset) for ( i = 1; i < max_cpus; i++ ) { /* Tell the next CPU to get ready */ - /* TODO: handle boards where CPUIDs are not contiguous */ - *gate = i; + *gate = cpu_logical_map(i); flush_xen_dcache(*gate); isb(); sev(); @@ -139,11 +138,22 @@ make_cpus_ready(unsigned int max_cpus, unsigned long boot_phys_offset) /* Boot the current CPU */ void __cpuinit start_secondary(unsigned long boot_phys_offset, unsigned long fdt_paddr, - unsigned long cpuid) + unsigned long hwid) { + unsigned int cpuid; + memset(get_cpu_info(), 0, sizeof (struct cpu_info)); - /* TODO: handle boards where CPUIDs are not contiguous */ + /* Browse the logical map and find the associate logical cpu ID */ + for ( cpuid = 1; cpuid < nr_cpu_ids; cpuid++ ) + { + if ( cpu_logical_map(cpuid) == hwid ) + break; + } + + if ( cpuid == nr_cpu_ids ) + panic("Can't find logical CPU id for cpu MPIDR[23:0] = 0x%lx\n", hwid); + set_processor_id(cpuid); current_cpu_data = boot_cpu_data; @@ -232,7 +242,7 @@ int __cpu_up(unsigned int cpu) /* Unblock the CPU. It should be waiting in the loop in head.S * for an event to arrive when smp_up_cpu matches its cpuid. */ - smp_up_cpu = cpu; + smp_up_cpu = cpu_logical_map(cpu); /* we need to make sure that the change to smp_up_cpu is visible to * secondary cpus with D-cache off */ flush_xen_dcache(smp_up_cpu);