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[92.224.199.244]) by mx.google.com with ESMTPSA id h3sm39864402oeo.2.2013.08.13.08.14.13 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 13 Aug 2013 08:14:15 -0700 (PDT) From: Andre Przywara To: stefano.stabellini@eu.citrix.com, Ian.Campbell@citrix.com, julien.grall@linaro.org Cc: xen-devel@lists.xen.org, patches@linaro.org, Andre Przywara Subject: [PATCH] ARM: add Calxeda Midway platform Date: Tue, 13 Aug 2013 17:13:07 +0200 Message-Id: <1376406787-23771-1-git-send-email-andre.przywara@linaro.org> X-Mailer: git-send-email 1.7.12.1 X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: andre.przywara@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.175 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Calxeda Midway is an ARMv7 server platform with Cortex-A15 cores. The peripheral side has many similarities with the machine known as Highbank. Add Calxeda Midway to the list of supported platforms to avoid a warning on boot and provide the proper reset method. Signed-off-by: Andre Przywara --- xen/arch/arm/platforms/Makefile | 1 + xen/arch/arm/platforms/midway.c | 62 ++++++++++++++++++++++++++++++++++ xen/include/asm-arm/platforms/midway.h | 21 ++++++++++++ 3 files changed, 84 insertions(+) create mode 100644 xen/arch/arm/platforms/midway.c create mode 100644 xen/include/asm-arm/platforms/midway.h diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile index ff2b65b..6ee8e6a 100644 --- a/xen/arch/arm/platforms/Makefile +++ b/xen/arch/arm/platforms/Makefile @@ -1,2 +1,3 @@ obj-y += vexpress.o obj-y += exynos5.o +obj-y += midway.o diff --git a/xen/arch/arm/platforms/midway.c b/xen/arch/arm/platforms/midway.c new file mode 100644 index 0000000..2d3be1b --- /dev/null +++ b/xen/arch/arm/platforms/midway.c @@ -0,0 +1,62 @@ +/* + * xen/arch/arm/platforms/midway.c + * + * Calxeda Midway specific settings + * + * Andre Przywara + * Copyright (c) 2013 Linaro Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include + +static void midway_reset(void) +{ + void __iomem *pmu; + + BUILD_BUG_ON((MW_SREG_PWR_REQ & PAGE_MASK) != + (MW_SREG_A15_PWR_CTRL & PAGE_MASK)); + + pmu = ioremap_nocache(MW_SREG_PWR_REQ & PAGE_MASK, PAGE_SIZE); + if ( !pmu ) + { + dprintk(XENLOG_ERR, "Unable to map PMU\n"); + return; + } + + iowritel(pmu + (MW_SREG_PWR_REQ & ~PAGE_MASK), MW_PWR_HARD_RESET); + iowritel(pmu + (MW_SREG_A15_PWR_CTRL & ~PAGE_MASK), 1); + iounmap(pmu); +} + +static const char const *midway_dt_compat[] __initdata = +{ + "calxeda,ecx-2000", + NULL +}; + +PLATFORM_START(midway, "CALXEDA MIDWAY") + .compatible = midway_dt_compat, + .reset = midway_reset, +PLATFORM_END + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/include/asm-arm/platforms/midway.h b/xen/include/asm-arm/platforms/midway.h new file mode 100644 index 0000000..099e435 --- /dev/null +++ b/xen/include/asm-arm/platforms/midway.h @@ -0,0 +1,21 @@ +#ifndef __ASM_ARM_PLATFORMS_MIDWAY_H +#define __ASM_ASM_PLATFORMS_MIDWAY_H + +/* addresses of SREG registers for resetting the SoC */ +#define MW_SREG_PWR_REQ 0xfff3cf00 +#define MW_SREG_A15_PWR_CTRL 0xfff3c200 + +#define MW_PWR_SUSPEND 0 +#define MW_PWR_SOFT_RESET 1 +#define MW_PWR_HARD_RESET 2 +#define MW_PWR_SHUTDOWN 3 + +#endif /* __ASM_ARM_PLATFORMS_MIDWAY_H */ +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */