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[46.33.159.2]) by mx.google.com with ESMTPSA id nb12sm3150016wic.3.2013.07.25.09.59.56 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 25 Jul 2013 09:59:57 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: ian.campbell@citrix.com, Stefano.Stabellini@eu.citrix.com, patches@linaro.org, Julien Grall Subject: [PATCH 3/8] xen/arm: Use define instead of hardcoded value in debug-pl011 Date: Thu, 25 Jul 2013 17:59:29 +0100 Message-Id: <1374771574-7848-4-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1374771574-7848-1-git-send-email-julien.grall@linaro.org> References: <1374771574-7848-1-git-send-email-julien.grall@linaro.org> X-Gm-Message-State: ALoCoQlLRYLLzhQl57X7xG8YKQUl1BbygutH7GvBlwOifTzjVDLzWO8kvLMIq4N7gptW91WeFUR2 X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.171 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Julien Grall --- xen/arch/arm/arm32/debug-pl011.inc | 18 ++++++++++-------- xen/include/asm-arm/pl011-uart.h | 1 + 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/xen/arch/arm/arm32/debug-pl011.inc b/xen/arch/arm/arm32/debug-pl011.inc index 8b085b8..6a64dbf 100644 --- a/xen/arch/arm/arm32/debug-pl011.inc +++ b/xen/arch/arm/arm32/debug-pl011.inc @@ -16,19 +16,21 @@ * GNU General Public License for more details. */ +#include + /* PL011 UART initialization * rb: register which contains the UART base address * rc: scratch register 1 * rd: scratch register 2 (unused here) */ .macro early_uart_init rb, rc, rd mov \rc, #(7372800 / EARLY_PRINTK_BAUD % 16) - str \rc, [\rb, #0x28] /* -> UARTFBRD (Baud divisor fraction) */ + str \rc, [\rb, #FBRD] /* -> UARTFBRD (Baud divisor fraction) */ mov \rc, #(7372800 / EARLY_PRINTK_BAUD / 16) - str \rc, [\rb, #0x24] /* -> UARTIBRD (Baud divisor integer) */ + str \rc, [\rb, #IBRD] /* -> UARTIBRD (Baud divisor integer) */ mov \rc, #0x60 /* 8n1 */ - str \rc, [\rb, #0x2C] /* -> UARTLCR_H (Line control) */ - ldr \rc, =0x00000301 /* RXE | TXE | UARTEN */ - str \rc, [\rb, #0x30] /* -> UARTCR (Control Register) */ + str \rc, [\rb, #LCR_H] /* -> UARTLCR_H (Line control) */ + ldr \rc, =(RXE | TXE | UARTEN) /* RXE | TXE | UARTEN */ + str \rc, [\rb, #CR] /* -> UARTCR (Control Register) */ .endm /* PL011 UART wait UART to be ready to transmit @@ -36,8 +38,8 @@ * rc: scratch register */ .macro early_uart_ready rb, rc 1: - ldr \rc, [\rb, #0x18] /* <- UARTFR (Flag register) */ - tst \rc, #0x8 /* Check BUSY bit */ + ldr \rc, [\rb, #FR] /* <- UARTFR (Flag register) */ + tst \rc, #BUSY /* Check BUSY bit */ bne 1b /* Wait for the UART to be ready */ .endm @@ -45,7 +47,7 @@ * rb: register which contains the UART base address * rt: register which contains the character to transmit */ .macro early_uart_transmit rb, rt - str \rt, [\rb] /* -> UARTDR (Data Register) */ + str \rt, [\rb, #DR] /* -> UARTDR (Data Register) */ .endm /* diff --git a/xen/include/asm-arm/pl011-uart.h b/xen/include/asm-arm/pl011-uart.h index 8c4edd4..3332c51 100644 --- a/xen/include/asm-arm/pl011-uart.h +++ b/xen/include/asm-arm/pl011-uart.h @@ -45,6 +45,7 @@ /* FR bits */ #define TXFE (1<<7) /* TX FIFO empty */ #define RXFE (1<<4) /* RX FIFO empty */ +#define BUSY (1<<3) /* Transmit is not complete */ /* LCR_H bits */ #define SPS (1<<7) /* Stick parity select */