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[46.33.159.2]) by mx.google.com with ESMTPSA id iz8sm7692080wic.3.2013.07.23.11.05.16 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 23 Jul 2013 11:05:17 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: ian.campbell@citrix.com, Stefano.Stabellini@eu.citrix.com, patches@linaro.org, Julien Grall Subject: [PATCH 1/3] xen/arm: Don't emulate the MMIO access if the instruction syndrome is invalid Date: Tue, 23 Jul 2013 19:05:11 +0100 Message-Id: <1374602713-716-2-git-send-email-julien.grall@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1374602713-716-1-git-send-email-julien.grall@linaro.org> References: <1374602713-716-1-git-send-email-julien.grall@linaro.org> X-Gm-Message-State: ALoCoQnjKJyOM2mXB+DULZWQRsUqY9UvIrDlCG2AefqRRgr/d6xkd4ZUAJE/TEqEgfz0hon1pA3s X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.48 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , When the instruction syndrome is not valid, the transfer register is unknown. If this register is used in the emulation code (it's the case for the VGIC), Xen can retrieve wrong data. For safety, consider invalid instruction syndrome as wrong memory access. Signed-off-by: Julien Grall --- xen/arch/arm/traps.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index bbd60aa..d6dc37d 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1017,6 +1017,10 @@ static void do_trap_data_abort_guest(struct cpu_user_regs *regs, if ( rc == -EFAULT ) goto bad_data_abort; + /* XXX: Decode the instruction if ISS is not valid */ + if ( !dabt.valid ) + goto bad_data_abort; + if (handle_mmio(&info)) { regs->pc += dabt.len ? 4 : 2;