From patchwork Mon Jun 24 23:04:24 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 18079 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-gh0-f197.google.com (mail-gh0-f197.google.com [209.85.160.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 9EB7625CFE for ; Mon, 24 Jun 2013 23:04:52 +0000 (UTC) Received: by mail-gh0-f197.google.com with SMTP id r20sf12136114ghr.4 for ; Mon, 24 Jun 2013 16:04:52 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=mime-version:x-beenthere:x-forwarded-to:x-forwarded-for :delivered-to:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references:x-gm-message-state:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-google-group-id:list-post:list-help:list-archive:list-unsubscribe; bh=6W1ZO00bSKgZT3I7hRwuxx05+LJYdDHZUUhQuxbed/8=; b=IMJhELc2IRBD6NOx7yhVSSpBGGNR9rL3GFfG18H3HDP7yzcMj/2uxXjowOBTgufPJ2 g9IS9zEmqLI+1G+MHozcvenzZVJ6+/x4ZbdpW32TyXwwwc8IsUCZgYp9k6/EMXG1RL83 7MvGc8PZ1fVp+L5hyRLWC+t4sGQD9q7xmkr8mK9UNr3sGzmNPKoSCHGk8ernN5tIQOd1 yDR31ZUgCSFNFFU19/+iw1vIZpeUlyTre7ie1UhT6OSxy66OzBkGJ5VRgBeh1fTljv04 N4xeUf1aGVxeNjStcxlNxaOSuKbsBvKBdmXfyGP+TvnrXMi/bfe4Aor7rATncS8cfheB I7zw== X-Received: by 10.236.45.4 with SMTP id o4mr14800572yhb.6.1372115092434; Mon, 24 Jun 2013 16:04:52 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.128.137 with SMTP id no9ls790061qeb.82.gmail; Mon, 24 Jun 2013 16:04:52 -0700 (PDT) X-Received: by 10.58.45.70 with SMTP id k6mr13104563vem.9.1372115092260; Mon, 24 Jun 2013 16:04:52 -0700 (PDT) Received: from mail-vb0-x22f.google.com (mail-vb0-x22f.google.com [2607:f8b0:400c:c02::22f]) by mx.google.com with ESMTPS id ek9si5491107vdb.128.2013.06.24.16.04.52 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 24 Jun 2013 16:04:52 -0700 (PDT) Received-SPF: neutral (google.com: 2607:f8b0:400c:c02::22f is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=2607:f8b0:400c:c02::22f; Received: by mail-vb0-f47.google.com with SMTP id x14so8658271vbb.20 for ; Mon, 24 Jun 2013 16:04:52 -0700 (PDT) X-Received: by 10.58.251.144 with SMTP id zk16mr12559002vec.37.1372115092168; Mon, 24 Jun 2013 16:04:52 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.58.165.8 with SMTP id yu8csp45687veb; Mon, 24 Jun 2013 16:04:51 -0700 (PDT) X-Received: by 10.194.110.6 with SMTP id hw6mr13109149wjb.3.1372115091285; Mon, 24 Jun 2013 16:04:51 -0700 (PDT) Received: from mail-we0-x233.google.com (mail-we0-x233.google.com [2a00:1450:400c:c03::233]) by mx.google.com with ESMTPS id q9si6925838wje.170.2013.06.24.16.04.50 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 24 Jun 2013 16:04:51 -0700 (PDT) Received-SPF: neutral (google.com: 2a00:1450:400c:c03::233 is neither permitted nor denied by best guess record for domain of julien.grall@linaro.org) client-ip=2a00:1450:400c:c03::233; Received: by mail-we0-f179.google.com with SMTP id w59so8792553wes.10 for ; Mon, 24 Jun 2013 16:04:50 -0700 (PDT) X-Received: by 10.180.106.163 with SMTP id gv3mr7331848wib.53.1372115090662; Mon, 24 Jun 2013 16:04:50 -0700 (PDT) Received: from belegaer.uk.xensource.com. (firewall.ctxuk.citrix.com. [46.33.159.2]) by mx.google.com with ESMTPSA id m3sm508537wij.5.2013.06.24.16.04.49 for (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 24 Jun 2013 16:04:49 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Cc: ian.campbell@citrix.com, Stefano.Stabellini@eu.citrix.com, patches@linaro.org, Julien Grall Subject: [PATCH 3/5] xen/arm: Don't reinject the IRQ if it's already in LRs Date: Tue, 25 Jun 2013 00:04:24 +0100 Message-Id: <1372115067-17071-4-git-send-email-julien.grall@citrix.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1372115067-17071-1-git-send-email-julien.grall@citrix.com> References: <1372115067-17071-1-git-send-email-julien.grall@citrix.com> X-Gm-Message-State: ALoCoQnGz7jHWuFx+XHYAw6wakn1307vyE1TjbW48EDLhl2EwLFxQwENOrYmVdTO8ZWuxVNpwvzX X-Original-Sender: julien.grall@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 2607:f8b0:400c:c02::22f is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Julien Grall When an IRQ, marked as IRQS_ONESHOT, is injected Linux will: - Disable the IRQ - Call the interrupt handler - Conditionnally enable the IRQ - EOI the IRQ When Linux will re-enable the IRQ, Xen will inject again the IRQ because it's still inflight. Therefore, LRs will contains duplicated IRQs and Xen will EOI it twice if it's a physical IRQ. Signed-off-by: Julien Grall --- xen/arch/arm/gic.c | 27 +++++++++++++++++++++++++++ xen/arch/arm/vgic.c | 3 ++- xen/include/asm-arm/gic.h | 3 +++ 3 files changed, 32 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 21575df..bf05716 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -570,6 +570,33 @@ int __init setup_dt_irq(const struct dt_irq *irq, struct irqaction *new) return rc; } +/* Check if an IRQ was already injected to the current VCPU */ +bool_t gic_irq_injected(unsigned int irq) +{ + bool_t found = 0; + int i = 0; + unsigned int virq; + + spin_lock_irq(&gic.lock); + + while ( (i = find_next_bit((unsigned long *)&this_cpu(lr_mask), + nr_lrs, i)) < nr_lrs ) + { + virq = GICH[GICH_LR + i] & GICH_LR_VIRTUAL_MASK; + + if ( virq == irq ) + { + found = 1; + break; + } + i++; + } + + spin_unlock_irq(&gic.lock); + + return found; +} + static inline void gic_set_lr(int lr, unsigned int virtual_irq, unsigned int state, unsigned int priority) { diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 2d91dce..cea9233 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -369,8 +369,9 @@ static void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n) while ( (i = find_next_bit((const long unsigned int *) &r, 32, i)) < 32 ) { irq = i + (32 * n); p = irq_to_pending(v, irq); - if ( !list_empty(&p->inflight) ) + if ( !list_empty(&p->inflight) && !gic_irq_injected(irq) ) gic_set_guest_irq(v, irq, GICH_LR_PENDING, p->priority); + i++; } } diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 513c1fc..f9e9ef1 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -197,6 +197,9 @@ extern unsigned int gic_number_lines(void); int gic_irq_xlate(const u32 *intspec, unsigned int intsize, unsigned int *out_hwirq, unsigned int *out_type); +/* Check if an IRQ was already injected to the current VCPU */ +bool_t gic_irq_injected(unsigned int irq); + #endif /* __ASSEMBLY__ */ #endif