From patchwork Thu Nov 22 11:50:43 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Martin X-Patchwork-Id: 13069 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 4196723E02 for ; Thu, 22 Nov 2012 11:50:57 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id 00C37A197AD for ; Thu, 22 Nov 2012 11:50:56 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id c10so446120ieb.11 for ; Thu, 22 Nov 2012 03:50:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=tNrvRBPvsyiqbSaGoSlKcYRgOSNdDt2wk+ygS43P5ME=; b=M1bQXQUa67BZsP+4hvs5o0zfV7AvCjJJcudIycW3+AsyQtxnZAL1NXRMnVR2sLESFq PaO4crTvTjgwpqhXfSZsAEUkehMNLR5gL5SUUHajWtPIcQwNu1WSeIiddbL3KziTfGYF tl6sOXjmkI0LdNWQ97UPD1X1AGE2okTYAXGq3Er9yhwOIXXRhr2lIsLUSuZrQP48SKe+ 4sjeXcD1JKitJkQMagUnYG9fHQEiBEOQ9Gfezc/7uNroqUP+9kS7pFyk8Uek9oyQrUEE JT8y3w/+rDkyFdJ5dnUN29BPqCekPGLIAEnbpLm+cIZS0aoAJwZGG3r55F9FGFgFV4rW SK6Q== Received: by 10.43.125.133 with SMTP id gs5mr192087icc.54.1353585056438; Thu, 22 Nov 2012 03:50:56 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp197478igt; Thu, 22 Nov 2012 03:50:55 -0800 (PST) Received: by 10.152.132.3 with SMTP id oq3mr274852lab.18.1353585054546; Thu, 22 Nov 2012 03:50:54 -0800 (PST) Received: from mail-la0-f49.google.com (mail-la0-f49.google.com [209.85.215.49]) by mx.google.com with ESMTPS id il9si2036206lab.32.2012.11.22.03.50.53 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 22 Nov 2012 03:50:54 -0800 (PST) Received-SPF: neutral (google.com: 209.85.215.49 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) client-ip=209.85.215.49; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.215.49 is neither permitted nor denied by best guess record for domain of dave.martin@linaro.org) smtp.mail=dave.martin@linaro.org Received: by mail-la0-f49.google.com with SMTP id r15so7021095lag.8 for ; Thu, 22 Nov 2012 03:50:53 -0800 (PST) Received: by 10.112.45.165 with SMTP id o5mr476553lbm.74.1353585053617; Thu, 22 Nov 2012 03:50:53 -0800 (PST) Received: from e103592.peterhouse.linaro.org (fw-lnat.cambridge.arm.com. [217.140.96.63]) by mx.google.com with ESMTPS id pw17sm1137030lab.5.2012.11.22.03.50.51 (version=SSLv3 cipher=OTHER); Thu, 22 Nov 2012 03:50:52 -0800 (PST) From: Dave Martin To: patches@arm.linux.org.uk Cc: patches@linaro.org, Dave Martin Subject: [PATCH] ARM: decompressor: Enable unaligned memory access for v6 and above Date: Thu, 22 Nov 2012 11:50:43 +0000 Message-Id: <1353585043-6655-1-git-send-email-dave.martin@linaro.org> X-Mailer: git-send-email 1.7.4.1 X-Gm-Message-State: ALoCoQmX1rQqPz4DbJmuEaiKpHHg9fToboLcLK4pTtNj7KzDp3BXS9Dm/VZB97p+b638v8x1wacw Modern GCC can generate code which makes use of the CPU's native unaligned memory access capabilities. This is useful for the C decompressor implementations used for unpacking compressed kernels. This patch disables alignment faults and enables the v6 unaligned access model on CPUs which support these features (i.e., v6 and later), allowing full unaligned access support for C code in the decompressor. The decompressor C code must not be built to assume that unaligned access works if support for v5 or older platforms is included in the kernel. For correct code generation, C decompressor code must always use the get_unaligned and put_unaligned accessors when dealing with unaligned pointers, regardless of this patch. Signed-off-by: Dave Martin Acked-by: Nicolas Pitre --- KernelVersion: 3.7-rc4 diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 90275f0..49ca86e 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -652,6 +652,15 @@ __setup_mmu: sub r3, r4, #16384 @ Page directory size mov pc, lr ENDPROC(__setup_mmu) +@ Enable unaligned access on v6, to allow better code generation +@ for the decompressor C code: +__armv6_mmu_cache_on: + mrc p15, 0, r0, c1, c0, 0 @ read SCTLR + bic r0, r0, #2 @ A (no unaligned access fault) + orr r0, r0, #1 << 22 @ U (v6 unaligned access model) + mcr p15, 0, r0, c1, c0, 0 @ write SCTLR + b __armv4_mmu_cache_on + __arm926ejs_mmu_cache_on: #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH mov r0, #4 @ put dcache in WT mode @@ -694,6 +703,9 @@ __armv7_mmu_cache_on: bic r0, r0, #1 << 28 @ clear SCTLR.TRE orr r0, r0, #0x5000 @ I-cache enable, RR cache replacement orr r0, r0, #0x003c @ write buffer + bic r0, r0, #2 @ A (no unaligned access fault) + orr r0, r0, #1 << 22 @ U (v6 unaligned access model) + @ (needed for ARM1176) #ifdef CONFIG_MMU #ifdef CONFIG_CPU_ENDIAN_BE8 orr r0, r0, #1 << 25 @ big-endian page tables @@ -914,7 +926,7 @@ proc_types: .word 0x0007b000 @ ARMv6 .word 0x000ff000 - W(b) __armv4_mmu_cache_on + W(b) __armv6_mmu_cache_on W(b) __armv4_mmu_cache_off W(b) __armv6_mmu_cache_flush