From patchwork Mon Nov 14 12:37:42 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Guittot X-Patchwork-Id: 5096 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id C9C8F23E01 for ; Mon, 14 Nov 2011 12:37:57 +0000 (UTC) Received: from mail-fx0-f52.google.com (mail-fx0-f52.google.com [209.85.161.52]) by fiordland.canonical.com (Postfix) with ESMTP id BE87FA180E0 for ; Mon, 14 Nov 2011 12:37:57 +0000 (UTC) Received: by faaa26 with SMTP id a26so395605faa.11 for ; Mon, 14 Nov 2011 04:37:57 -0800 (PST) Received: by 10.152.135.166 with SMTP id pt6mr14067276lab.26.1321274277535; Mon, 14 Nov 2011 04:37:57 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.152.40.7 with SMTP id t7cs37757lak; Mon, 14 Nov 2011 04:37:57 -0800 (PST) Received: by 10.216.177.208 with SMTP id d58mr61540wem.105.1321274275747; Mon, 14 Nov 2011 04:37:55 -0800 (PST) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id v5si5574315weq.132.2011.11.14.04.37.55 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 14 Nov 2011 04:37:55 -0800 (PST) Received-SPF: neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 74.125.82.50 is neither permitted nor denied by best guess record for domain of vincent.guittot@linaro.org) smtp.mail=vincent.guittot@linaro.org Received: by wwg14 with SMTP id 14so6164956wwg.31 for ; Mon, 14 Nov 2011 04:37:55 -0800 (PST) Received: by 10.216.132.41 with SMTP id n41mr3882565wei.77.1321274274996; Mon, 14 Nov 2011 04:37:54 -0800 (PST) Received: from localhost.localdomain (pas72-1-88-161-60-229.fbx.proxad.net. [88.161.60.229]) by mx.google.com with ESMTPS id fw16sm24721119wbb.13.2011.11.14.04.37.53 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 14 Nov 2011 04:37:54 -0800 (PST) From: Vincent Guittot To: linaro-dev@lists.linaro.org Cc: patches@linaro.org, Vincent Guittot Subject: [RFC PATCH v2 02/09] ARM: cpu topology: modify cpu topology Date: Mon, 14 Nov 2011 13:37:42 +0100 Message-Id: <1321274262-2230-1-git-send-email-vincent.guittot@linaro.org> X-Mailer: git-send-email 1.7.4.1 Modify the CPU topology policy according to the sched_mc level and the cortex family Signed-off-by: Vincent Guittot --- arch/arm/kernel/topology.c | 80 +++++++++++++++++++++++++++++++++++++++++-- 1 files changed, 76 insertions(+), 4 deletions(-) diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index 90352cb..af1c3e6 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -47,7 +48,7 @@ struct cputopo_arm cpu_topology[NR_CPUS]; * cpu topology mask management */ -unsigned int advanced_topology = 0; +unsigned int advanced_topology = 1; /* * default topology function @@ -113,6 +114,74 @@ static void normal_cpu_topology_mask(void) } /* + * For Cortex-A9 MPcore, we emulate a multi-package topology in power mode. + * The goal is to gathers tasks on 1 virtual package + */ +static void power_cpu_topology_mask_CA9(void) +{ + + unsigned int cpuid, cpu; + + for_each_possible_cpu(cpuid) { + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; + + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + + if ((cpuid_topo->socket_id == cpu_topo->socket_id) + && ((cpuid & 0x1) == (cpu & 0x1))) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } + } + smp_wmb(); +} + +#define ARM_FAMILY_MASK 0xFF0FFFF0 +#define ARM_CORTEX_A9_FAMILY 0x410FC090 + +/* update_cpu_topology_policy select a cpu topology policy according to the + * available cores. + * TODO: The current version assumes that all cores are exactly the same which + * might not be true. We need to update it to take into account various + * configuration among which system with different kind of core. + */ +static int update_cpu_topology_policy(void) +{ + unsigned long cpuid; + + if (sched_mc_power_savings == POWERSAVINGS_BALANCE_NONE) { + set_cpu_topology_mask = normal_cpu_topology_mask; + return 0; + } + + cpuid = read_cpuid_id(); + cpuid &= ARM_FAMILY_MASK; + + switch (cpuid) { + case ARM_CORTEX_A9_FAMILY: + set_cpu_topology_mask = power_cpu_topology_mask_CA9; + break; + default: + set_cpu_topology_mask = normal_cpu_topology_mask; + break; + } + + return 0; +} + +/* * store_cpu_topology is called at boot when only one cpu is running * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, * which prevents simultaneous write access to cpu_topology array @@ -183,11 +252,14 @@ int arch_update_cpu_topology(void) if (!advanced_topology) return 0; - /* clear core mask */ + /* clear core threads mask */ clear_cpu_topology_mask(); - /* update core and thread sibling masks */ - normal_cpu_topology_mask(); + /* set topology policy */ + update_cpu_topology_policy(); + + /* set topology mask*/ + (*set_cpu_topology_mask)(); return 1; }