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Sat, 10 Mar 2018 16:42:44 -0800 (PST) Received: from localhost ([217.30.68.212]) by smtp.gmail.com with ESMTPSA id j137sm3505236wmd.17.2018.03.10.16.42.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 10 Mar 2018 16:42:43 -0800 (PST) From: Martin Jansa X-Google-Original-From: Martin Jansa To: Armin Kuster , openembedded-core@lists.openembedded.org Date: Sun, 11 Mar 2018 00:42:21 +0000 Message-Id: <7f5485d2b8f978964f1f932fd328c98d0a1872c0.1520728802.git.Martin.Jansa@gmail.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: References: Subject: [OE-core] [morty][PATCH 09/16] gcc-6.3: Backport patch to fix ICE on ARM X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org From: Khem Raj Fixes internal compiler error: Max. number of generated reload insns per insn is achieved (90) Signed-off-by: Khem Raj Signed-off-by: Richard Purdie (cherry picked from commit d2631f45a057c53797b7ba657662f35f66a2b04e) --- meta/recipes-devtools/gcc/gcc-6.3.inc | 1 + ...-relax-the-restriction-on-subreg-reload-f.patch | 51 ++++++++++++++++++++++ 2 files changed, 52 insertions(+) create mode 100644 meta/recipes-devtools/gcc/gcc-6.3/0056-LRA-PR70904-relax-the-restriction-on-subreg-reload-f.patch -- 2.15.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/recipes-devtools/gcc/gcc-6.3.inc b/meta/recipes-devtools/gcc/gcc-6.3.inc index d74f12c466..0d98be3861 100644 --- a/meta/recipes-devtools/gcc/gcc-6.3.inc +++ b/meta/recipes-devtools/gcc/gcc-6.3.inc @@ -81,6 +81,7 @@ SRC_URI = "\ file://0048-sync-gcc-stddef.h-with-musl.patch \ file://0054_all_nopie-all-flags.patch \ file://0055-unwind_h-glibc26.patch \ + file://0056-LRA-PR70904-relax-the-restriction-on-subreg-reload-f.patch \ ${BACKPORTS} \ " BACKPORTS = "\ diff --git a/meta/recipes-devtools/gcc/gcc-6.3/0056-LRA-PR70904-relax-the-restriction-on-subreg-reload-f.patch b/meta/recipes-devtools/gcc/gcc-6.3/0056-LRA-PR70904-relax-the-restriction-on-subreg-reload-f.patch new file mode 100644 index 0000000000..231f147619 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc-6.3/0056-LRA-PR70904-relax-the-restriction-on-subreg-reload-f.patch @@ -0,0 +1,51 @@ +From a582b0a53d1dc8604a201348b99ca8de48784e7e Mon Sep 17 00:00:00 2001 +From: jiwang +Date: Thu, 12 May 2016 17:00:52 +0000 +Subject: [PATCH] [LRA] PR70904, relax the restriction on subreg reload for + wide mode + +2016-05-12 Jiong Wang + +gcc/ + PR rtl-optimization/70904 + * lra-constraint.c (process_addr_reg): Relax the restriction on + subreg reload for wide mode. + +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@236181 138bc75d-0d04-0410-961f-82ee72b054a4 +--- +Upstream-Status: Backport +Signed-off-by: Khem Raj + + gcc/lra-constraints.c | 16 +++++++++++++++- + 1 file changed, 15 insertions(+), 1 deletion(-) + +diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c +index f96fd458e23..73fb72a2ea5 100644 +--- a/gcc/lra-constraints.c ++++ b/gcc/lra-constraints.c +@@ -1326,7 +1326,21 @@ process_addr_reg (rtx *loc, bool check_only_p, rtx_insn **before, rtx_insn **aft + + subreg_p = GET_CODE (*loc) == SUBREG; + if (subreg_p) +- loc = &SUBREG_REG (*loc); ++ { ++ reg = SUBREG_REG (*loc); ++ mode = GET_MODE (reg); ++ ++ /* For mode with size bigger than ptr_mode, there unlikely to be "mov" ++ between two registers with different classes, but there normally will ++ be "mov" which transfers element of vector register into the general ++ register, and this normally will be a subreg which should be reloaded ++ as a whole. This is particularly likely to be triggered when ++ -fno-split-wide-types specified. */ ++ if (in_class_p (reg, cl, &new_class) ++ || GET_MODE_SIZE (mode) <= GET_MODE_SIZE (ptr_mode)) ++ loc = &SUBREG_REG (*loc); ++ } ++ + reg = *loc; + mode = GET_MODE (reg); + if (! REG_P (reg)) +-- +2.14.2 +