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Thu, 21 Nov 2019 10:21:19 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:8500:1c20::d61]) by smtp.gmail.com with ESMTPSA id k13sm3877082pgl.69.2019.11.21.10.21.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Nov 2019 10:21:19 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Thu, 21 Nov 2019 10:21:05 -0800 Message-Id: <20191121182105.2803314-1-raj.khem@gmail.com> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 Subject: [OE-core] [PATCH] systemd-bootchart: Add RISC-V support X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org This is a partial backport from upstream systemd Signed-off-by: Khem Raj --- ...itecture-Recognise-RISCV-32-RISCV-64.patch | 45 +++++++++++++++++++ .../systemd-bootchart_233.bb | 1 + 2 files changed, 46 insertions(+) create mode 100644 meta/recipes-devtools/systemd-bootchart/systemd-bootchart/0001-architecture-Recognise-RISCV-32-RISCV-64.patch -- 2.24.0 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/recipes-devtools/systemd-bootchart/systemd-bootchart/0001-architecture-Recognise-RISCV-32-RISCV-64.patch b/meta/recipes-devtools/systemd-bootchart/systemd-bootchart/0001-architecture-Recognise-RISCV-32-RISCV-64.patch new file mode 100644 index 0000000000..5e89195915 --- /dev/null +++ b/meta/recipes-devtools/systemd-bootchart/systemd-bootchart/0001-architecture-Recognise-RISCV-32-RISCV-64.patch @@ -0,0 +1,45 @@ +From 4a6ace0a965965ea15e88c3418c7158ca5cc9f8f Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Thu, 21 Nov 2019 10:12:05 -0800 +Subject: [PATCH] architecture: Recognise RISCV-32/RISCV-64 + +Upstream-Status: Pending +Signed-off-by: Khem Raj +--- + src/architecture.h | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/src/architecture.h b/src/architecture.h +index 26679e2..89c7d32 100644 +--- a/src/architecture.h ++++ b/src/architecture.h +@@ -57,6 +57,8 @@ enum { + ARCHITECTURE_M68K, + ARCHITECTURE_TILEGX, + ARCHITECTURE_CRIS, ++ ARCHITECTURE_RISCV32, ++ ARCHITECTURE_RISCV64, + _ARCHITECTURE_MAX, + _ARCHITECTURE_INVALID = -1 + }; +@@ -194,6 +196,17 @@ int uname_architecture(void); + #elif defined(__cris__) + # define native_architecture() ARCHITECTURE_CRIS + # error "Missing LIB_ARCH_TUPLE for CRIS" ++#elif defined(__riscv) ++# if __SIZEOF_POINTER__ == 4 ++# define native_architecture() ARCHITECTURE_RISCV32 ++# define LIB_ARCH_TUPLE "riscv32-linux-gnu" ++# elif __SIZEOF_POINTER__ == 8 ++# define native_architecture() ARCHITECTURE_RISCV64 ++# define LIB_ARCH_TUPLE "riscv64-linux-gnu" ++# else ++# error "Unrecognized riscv architecture variant" ++# endif ++# define PROC_CPUINFO_MODEL "cpu model" + #else + # error "Please register your architecture here!" + #endif +-- +2.24.0 + diff --git a/meta/recipes-devtools/systemd-bootchart/systemd-bootchart_233.bb b/meta/recipes-devtools/systemd-bootchart/systemd-bootchart_233.bb index aef8839864..960edc75e6 100644 --- a/meta/recipes-devtools/systemd-bootchart/systemd-bootchart_233.bb +++ b/meta/recipes-devtools/systemd-bootchart/systemd-bootchart_233.bb @@ -3,6 +3,7 @@ LIC_FILES_CHKSUM = "file://LICENSE.LGPL2.1;md5=4fbd65380cdd255951079008b364516c file://LICENSE.GPL2;md5=751419260aa954499f7abaabaa882bbe" SRC_URI = "git://github.com/systemd/systemd-bootchart.git;protocol=https \ + file://0001-architecture-Recognise-RISCV-32-RISCV-64.patch \ " SRC_URI_append_libc-musl = " \