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Mon, 04 Feb 2019 18:57:49 -0800 (PST) Received: from apollo.hsd1.ca.comcast.net ([2601:646:8500:6bc6::a005]) by smtp.gmail.com with ESMTPSA id u87sm2453788pfi.2.2019.02.04.18.57.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 18:57:47 -0800 (PST) From: Khem Raj To: openembedded-core@lists.openembedded.org Date: Mon, 4 Feb 2019 18:57:27 -0800 Message-Id: <20190205025727.1937-6-raj.khem@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190205025727.1937-1-raj.khem@gmail.com> References: <20190205025727.1937-1-raj.khem@gmail.com> MIME-Version: 1.0 Subject: [OE-core] [PATCH 6/6] tune-cortexa72: add tunes for ARM Cortex-A72 X-BeenThere: openembedded-core@lists.openembedded.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: Patches and discussions about the oe-core layer List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: openembedded-core-bounces@lists.openembedded.org Errors-To: openembedded-core-bounces@lists.openembedded.org From: ayaka It looks that the Cryptography engine is mandatory in this platform. https://developer.arm.com/products/processors/cortex-a/cortex-a72 Signed-off-by: Randy Li Signed-off-by: Khem Raj --- meta/conf/machine/include/tune-cortexa72.inc | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 meta/conf/machine/include/tune-cortexa72.inc -- 2.20.1 -- _______________________________________________ Openembedded-core mailing list Openembedded-core@lists.openembedded.org http://lists.openembedded.org/mailman/listinfo/openembedded-core diff --git a/meta/conf/machine/include/tune-cortexa72.inc b/meta/conf/machine/include/tune-cortexa72.inc new file mode 100644 index 0000000000..f5a524fa04 --- /dev/null +++ b/meta/conf/machine/include/tune-cortexa72.inc @@ -0,0 +1,12 @@ +DEFAULTTUNE ?= "cortexa72" + +TUNEVALID[cortexa72] = "Enable Cortex-A72 specific processor optimizations" +TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa72', ' -mcpu=cortex-a72', '', d)}" + +require conf/machine/include/arm/arch-armv8a.inc + +# Little Endian base configs +AVAILTUNES += "cortexa72" +ARMPKGARCH_tune-cortexa72 = "cortexa72" +TUNE_FEATURES_tune-cortexa72 = "aarch64 cortexa72 simd crc crypto" +PACKAGE_EXTRA_ARCHS_tune-cortexa72 = "${PACKAGE_EXTRA_ARCHS_tune-armv8a-crc-crypto} cortexa72"