From patchwork Tue Jul 23 21:35:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 169565 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp9377102ilk; Tue, 23 Jul 2019 14:37:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqwp7E7l/zlYJ6bmZ3TqJTuKQWKIUzNejGsBbInmC4gFwwPEYqwdKmOHn1YF4fJaP0yguHvP X-Received: by 2002:a02:c95a:: with SMTP id u26mr78414356jao.15.1563917859051; Tue, 23 Jul 2019 14:37:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563917859; cv=none; d=google.com; s=arc-20160816; b=TMDuMg5elpR9ng7yg5AYPWl9x4cvUnP5euN7FGyxZtm+mTd9/kUIPEyPLvMwytgqio ldwBfPGff1uMpmT2j7Mm4c49wzsLWOBcdBv5uamcddvmkvHzBbLF+9QNOkBA1Lgns8ts fSVGWiCDjmzm0nfyV/Tz3avvOdavb/BwAjncQy5o24HAgA2+Z18p8qu8cB1y1IXDSdDp VmPcVOuemHF7tipU+Vz9Z5y1PAjquP71NlOnj/J9WWHHqMu0ggiLkxe6QYg1phuHzbUJ NSbuOVQKeHUtdJmya/wDdYwcKENBAM6tzJgx6gOKZakskvtmhSSs+d40TiB0J3E4wOW3 Lb3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=SBM9rcL02njLtqZuF8aVErSQwDVj2oLJ7DeI6aSNZtU=; b=VJLrSEi3XO/Hd/2wCrWNsThhC7PnFU0iRY3P2soCqzLxY5KtxdBSpYDtvugX2V3uYs xTM4YW88eQ+gjQRaMOgOcTqhHt0ene4UaWUZFI1Or2ciiXa7199ShGfad4++bphn8NL2 gOewPgwx0gVt8Rib6WcEHNv2lgUg4pJbybqbBBln6h4TctzOLQjeEdYrzBi2rXip2jtX qMZQe1ncfthSdCOpfEpT2kkxgk7N9dv3rcGzbU+Bf7Q7S96d9KDpK0ZNa5Z1lSusFxEf T9ecETla3xZjuLHJCeADTRD7XKwP5z0QvG316sGdOFmCogM+sCmYuK5/SggVXdQFfntC zAZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id w3si62405722jae.112.2019.07.23.14.37.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 23 Jul 2019 14:37:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hq2S6-0001vf-8b; Tue, 23 Jul 2019 21:36:06 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hq2S4-0001vL-Ly for xen-devel@lists.xenproject.org; Tue, 23 Jul 2019 21:36:04 +0000 X-Inumbo-ID: dd82f3b8-ad91-11e9-b2fc-8fe1da1518da Received: from foss.arm.com (unknown [217.140.110.172]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id dd82f3b8-ad91-11e9-b2fc-8fe1da1518da; Tue, 23 Jul 2019 21:36:01 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C8C821509; Tue, 23 Jul 2019 14:36:00 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 076A33F71F; Tue, 23 Jul 2019 14:35:59 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 23 Jul 2019 22:35:47 +0100 Message-Id: <20190723213553.22300-2-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190723213553.22300-1-julien.grall@arm.com> References: <20190723213553.22300-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 1/7] xen/public: arch-arm: Restrict the visibility of struct vcpu_guest_core_regs X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Volodymyr Babchuk MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Currently, the structure vcpu_guest_core_regs is part of the public API. This implies that any change in the structure should be backward compatible. However, the structure is only needed by the tools and Xen. It is also not expected to be ever used outside of that context. So we could save us some headache by only declaring the structure for Xen and tools. Suggested-by: Andrew Cooper Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- This is a follow-up of the discussion [1]. [1] <3c245c5b-51c6-1d0e-ad6c-42414573166f@arm.com> Changes in v3: - Avoid introduce a new #ifdef in the header by moving the definitions later on. --- xen/include/public/arch-arm.h | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index 3e8cdc151d..7ce139a0f5 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -197,6 +197,18 @@ } while ( 0 ) #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) +typedef uint64_t xen_pfn_t; +#define PRI_xen_pfn PRIx64 +#define PRIu_xen_pfn PRIu64 + +/* Maximum number of virtual CPUs in legacy multi-processor guests. */ +/* Only one. All other VCPUS must use VCPUOP_register_vcpu_info */ +#define XEN_LEGACY_MAX_VCPUS 1 + +typedef uint64_t xen_ulong_t; +#define PRI_xen_ulong PRIx64 + +#if defined(__XEN__) || defined(__XEN_TOOLS__) #if defined(__GNUC__) && !defined(__STRICT_ANSI__) /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */ # define __DECL_REG(n64, n32) union { \ @@ -272,18 +284,6 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t); #undef __DECL_REG -typedef uint64_t xen_pfn_t; -#define PRI_xen_pfn PRIx64 -#define PRIu_xen_pfn PRIu64 - -/* Maximum number of virtual CPUs in legacy multi-processor guests. */ -/* Only one. All other VCPUS must use VCPUOP_register_vcpu_info */ -#define XEN_LEGACY_MAX_VCPUS 1 - -typedef uint64_t xen_ulong_t; -#define PRI_xen_ulong PRIx64 - -#if defined(__XEN__) || defined(__XEN_TOOLS__) struct vcpu_guest_context { #define _VGCF_online 0 #define VGCF_online (1<<_VGCF_online)