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[192.237.175.120]) by mx.google.com with ESMTPS id a128si19855116ywf.375.2019.01.28.03.52.28 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 28 Jan 2019 03:52:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1go5R2-00035y-8P; Mon, 28 Jan 2019 11:50:40 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1go5R1-00035Z-3i for xen-devel@lists.xenproject.org; Mon, 28 Jan 2019 11:50:39 +0000 X-Inumbo-ID: edf0be6b-22f2-11e9-aeee-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id edf0be6b-22f2-11e9-aeee-bc764e045a96; Mon, 28 Jan 2019 11:50:38 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DD28515AD; Mon, 28 Jan 2019 03:50:37 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F107C3F59C; Mon, 28 Jan 2019 03:50:36 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 28 Jan 2019 11:50:24 +0000 Message-Id: <20190128115026.3336-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190128115026.3336-1-julien.grall@arm.com> References: <20190128115026.3336-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH for-4.12 v2 5/7] xen/arm: p2m: Only use isb() when it is necessary X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Julien Grall , sstabellini@kernel.org, Andrii Anisov MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The EL1 translation regime is out-of-context when running at EL2. This means the processor cannot speculate memory accesses using the registers associated to that regime. An isb() is only needed if Xen is going to use the translation regime before returning to the guest (exception returns will synchronize the context). Remove unnecessary isb() and document the ones left. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov Reviewed-by: Stefano Stabellini --- Changes in v2: - Remove pointless {} - Fix typoes - Add Andrii's reviewed-by --- xen/arch/arm/p2m.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 9844bfb936..44391a5f8c 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -106,17 +106,21 @@ void p2m_restore_state(struct vcpu *n) return; WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); - isb(); - WRITE_SYSREG(n->arch.sctlr, SCTLR_EL1); - isb(); - WRITE_SYSREG(n->arch.hcr_el2, HCR_EL2); - isb(); last_vcpu_ran = &p2m->last_vcpu_ran[smp_processor_id()]; /* + * While we are restoring an out-of-context translation regime + * we still need to ensure: + * - VTTBR_EL2 is synchronized before flushing the TLBs + * - All registers for EL1 are synchronized before executing an AT + * instructions targeting S1/S2. + */ + isb(); + + /* * Flush local TLB for the domain to prevent wrong TLB translation * when running multiple vCPU of the same domain on a single pCPU. */ @@ -147,6 +151,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) { local_irq_save(flags); WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2); + /* Ensure VTTBR_EL2 is synchronized before flushing the TLBs */ isb(); } @@ -155,6 +160,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) if ( ovttbr != READ_SYSREG64(VTTBR_EL2) ) { WRITE_SYSREG64(ovttbr, VTTBR_EL2); + /* Ensure VTTBR_EL2 is back in place before continuing. */ isb(); local_irq_restore(flags); } @@ -1907,7 +1913,6 @@ static uint32_t __read_mostly vtcr; static void setup_virt_paging_one(void *data) { WRITE_SYSREG32(vtcr, VTCR_EL2); - isb(); } void __init setup_virt_paging(void)