diff mbox series

[Xen-devel,49/57] ARM: new VGIC: provide system register emulation stub

Message ID 20180305160415.16760-50-andre.przywara@linaro.org
State Superseded
Headers show
Series New VGIC(-v2) implementation | expand

Commit Message

Andre Przywara March 5, 2018, 4:04 p.m. UTC 
The Xen arch code traps system registers writes from the guest and will
relay anything GIC related to the VGIC.
Since this affects only GICv3 (which we don't yet emulate), provide a
stub implementation of vgic_emulate() for now.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
---
Changelog RFC ... v1:
- no changes

 xen/arch/arm/vgic/vgic.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Julien Grall March 9, 2018, 5:53 p.m. UTC | #1 
On 05/03/18 16:04, Andre Przywara wrote:
> The Xen arch code traps system registers writes from the guest and will
> relay anything GIC related to the VGIC.
> Since this affects only GICv3 (which we don't yet emulate), provide a
> stub implementation of vgic_emulate() for now.
> 
> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>

Acked-by: Julien Grall <julien.grall@arm.com>

Cheers,

> ---
> Changelog RFC ... v1:
> - no changes
> 
>   xen/arch/arm/vgic/vgic.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c
> index 2a2b8fd1eb..e1952c872d 100644
> --- a/xen/arch/arm/vgic/vgic.c
> +++ b/xen/arch/arm/vgic/vgic.c
> @@ -813,6 +813,13 @@ struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v,
>       return desc;
>   }
>   
> +bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
> +{
> +    ASSERT(current->domain->arch.vgic.version == GIC_V3);
> +
> +    return false;
> +}
> +
>   /*
>    * was:
>    *      int kvm_vgic_map_phys_irq(struct vcpu *vcpu, u32 virt_irq, u32 phys_irq)
>
diff mbox series

Patch

diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c
index 2a2b8fd1eb..e1952c872d 100644
--- a/xen/arch/arm/vgic/vgic.c
+++ b/xen/arch/arm/vgic/vgic.c
@@ -813,6 +813,13 @@  struct irq_desc *vgic_get_hw_irq_desc(struct domain *d, struct vcpu *v,
     return desc;
 }
 
+bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
+{
+    ASSERT(current->domain->arch.vgic.version == GIC_V3);
+
+    return false;
+}
+
 /*
  * was:
  *      int kvm_vgic_map_phys_irq(struct vcpu *vcpu, u32 virt_irq, u32 phys_irq)