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[217.160.17.100]) by smtp.gmail.com with ESMTPSA id b35sm2552229wra.13.2018.02.09.06.39.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 09 Feb 2018 06:39:58 -0800 (PST) From: Andre Przywara To: Stefano Stabellini , Julien Grall , xen-devel@lists.xenproject.org Date: Fri, 9 Feb 2018 14:39:01 +0000 Message-Id: <20180209143937.28866-14-andre.przywara@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180209143937.28866-1-andre.przywara@linaro.org> References: <20180209143937.28866-1-andre.przywara@linaro.org> Subject: [Xen-devel] [RFC PATCH 13/49] ARM: VGIC: Add hypervisor base address to vgic_v2_setup_hw() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" The new VGIC will need to know the hypervisor base address at some point, which is private to the hardware facing part of the VGIC so far. Add a parameter to vgic_v2_setup_hw() to pass this address on, so a VGIC implementation can make use of it. The current VGIC ignores this new parameter. TODO: add proper value for GICv2 on GICv3 emulation! Signed-off-by: Andre Przywara --- xen/arch/arm/gic-v2.c | 3 ++- xen/arch/arm/gic-v3.c | 3 ++- xen/arch/arm/vgic-v2.c | 3 ++- xen/include/asm-arm/vgic.h | 3 ++- 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 2b271ba322..7a18abecfa 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1207,7 +1207,8 @@ static int __init gicv2_init(void) if ( !gicv2.map_hbase ) panic("GICv2: Failed to ioremap for GIC Virtual interface\n"); - vgic_v2_setup_hw(dbase, cbase, csize, vbase, aliased_offset); + vgic_v2_setup_hw(dbase, cbase, csize, vbase, gicv2.map_hbase, + aliased_offset); /* Global settings: interrupt distributor */ spin_lock_init(&gicv2.lock); diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index ea14ab4028..08d4703687 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1238,7 +1238,8 @@ static void __init gicv3_init_v2(void) printk("GICv3 compatible with GICv2 cbase %#"PRIpaddr" vbase %#"PRIpaddr"\n", cbase, vbase); - vgic_v2_setup_hw(dbase, cbase, csize, vbase, 0); + /* TODO: provide the proper HBASE address! */ + vgic_v2_setup_hw(dbase, cbase, csize, vbase, NULL, 0); } static void __init gicv3_ioremap_distributor(paddr_t dist_paddr) diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 646d1f3d12..96d543c005 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -47,7 +47,8 @@ static struct { } vgic_v2_hw; void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, - paddr_t vbase, uint32_t aliased_offset) + paddr_t vbase, void __iomem *hbase, + uint32_t aliased_offset) { vgic_v2_hw.enabled = true; vgic_v2_hw.dbase = dbase; diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h index 8c39ff1402..85ad2aca79 100644 --- a/xen/include/asm-arm/vgic.h +++ b/xen/include/asm-arm/vgic.h @@ -302,7 +302,8 @@ extern bool vgic_to_sgi(struct vcpu *v, register_t sgir, extern bool vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq); void vgic_v2_setup_hw(paddr_t dbase, paddr_t cbase, paddr_t csize, - paddr_t vbase, uint32_t aliased_offset); + paddr_t vbase, void __iomem *hbase, + uint32_t aliased_offset); #ifdef CONFIG_HAS_GICV3 struct rdist_region;