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[217.160.17.100]) by smtp.gmail.com with ESMTPSA id n2sm7885819wra.41.2018.02.06.09.09.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 06 Feb 2018 09:09:17 -0800 (PST) From: Andre Przywara To: Julien Grall , Stefano Stabellini Date: Tue, 6 Feb 2018 17:09:03 +0000 Message-Id: <20180206170903.30637-9-andre.przywara@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180206170903.30637-1-andre.przywara@linaro.org> References: <20180206170903.30637-1-andre.przywara@linaro.org> Cc: xen-devel@lists.xenproject.org Subject: [Xen-devel] [PATCH v5 8/8] ARM: make nr_irqs a constant X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" On ARM the maximum number of IRQs is a constant, but we share it being a variable to match x86. Since we are not supposed to alter it, let's mark it as "const" to avoid accidental change. Suggested-by: Julien Grall Signed-off-by: Andre Przywara Acked-by: Julien Grall --- xen/arch/arm/irq.c | 2 +- xen/include/asm-arm/irq.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 62103a20e3..29af10e82c 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -27,7 +27,7 @@ #include #include -unsigned int __read_mostly nr_irqs = NR_IRQS; +const unsigned int nr_irqs = NR_IRQS; static unsigned int local_irqs_type[NR_LOCAL_IRQS]; static DEFINE_SPINLOCK(local_irqs_type_lock); diff --git a/xen/include/asm-arm/irq.h b/xen/include/asm-arm/irq.h index 0d110ecb08..9d55e9b122 100644 --- a/xen/include/asm-arm/irq.h +++ b/xen/include/asm-arm/irq.h @@ -34,7 +34,7 @@ struct arch_irq_desc { /* This is a spurious interrupt ID which never makes it into the GIC code. */ #define INVALID_IRQ 1023 -extern unsigned int nr_irqs; +extern const unsigned int nr_irqs; #define nr_static_irqs NR_IRQS #define arch_hwdom_irqs(domid) NR_IRQS