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[192.237.175.120]) by mx.google.com with ESMTPS id b128si5814246itb.35.2016.12.07.04.36.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 07 Dec 2016 04:36:06 -0800 (PST) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cEbQE-000675-E5; Wed, 07 Dec 2016 12:34:06 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cEbQD-000666-If for xen-devel@lists.xen.org; Wed, 07 Dec 2016 12:34:05 +0000 Received: from [85.158.137.68] by server-3.bemta-3.messagelabs.com id B6/6A-24885-CB108485; Wed, 07 Dec 2016 12:34:04 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrCLMWRWlGSWpSXmKPExsVysyfVTXcPo0e EwcdFfBZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8aZ19YFa4Uqnky9z9bA+Jyni5GLQ0hgE6PE vdfdjF2MnEDOaUaJHTe8QGw2AU2JO58/MYHYIgLSEtc+XwarYRZwkHjz8R4LiC0s4Cix7c86t i5GDg4WAVWJg9MtQMK8Ai4SR1ZOAyuXEJCTOHlsMiuIzSngKnHr618WiFUuEl+blrFMYORewM iwilGjOLWoLLVI18hCL6koMz2jJDcxM0fX0MBYLze1uDgxPTUnMalYLzk/dxMj0Lf1DAyMOxj bT/gdYpTkYFIS5d01wT1CiC8pP6UyI7E4I76oNCe1+BCjDAeHkgTvIgaPCCHBotT01Iq0zBxg kMGkJTh4lER49/0HauUtLkjMLc5Mh0idYlSUEuedC9InAJLIKM2Da4MF9iVGWSlhXkYGBgYhn oLUotzMElT5V4ziHIxKwry/QabwZOaVwE1/BbSYCWjxvBtgi0sSEVJSDYxR6Rfssh20Ki2Pr2 D+L3e9uCj1Te+ZNXp+e611Vogvs7uRZvj8hgeP1ll5uZ3/26YGmjCzrtRTUhSNe7Hv/vTpu5m zL3f2LTfUmyykdnrN0zn1cf+6gueVc2Qp3T7xpL5zwkzjL/vOb7ql/u/DepcLB5/frN/Z75zR JlsvJRRa/UKXc82SUzOUWIozEg21mIuKEwEeAaViZwIAAA== X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-11.tower-31.messagelabs.com!1481114043!44037470!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.0.16; banners=-,-,- X-VirusChecked: Checked Received: (qmail 3471 invoked from network); 7 Dec 2016 12:34:04 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-11.tower-31.messagelabs.com with SMTP; 7 Dec 2016 12:34:04 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 742DC707; Wed, 7 Dec 2016 04:34:03 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.218.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D5D993F477; Wed, 7 Dec 2016 04:34:02 -0800 (PST) From: Julien Grall To: xen-devel@lists.xen.org Date: Wed, 7 Dec 2016 12:33:43 +0000 Message-Id: <1481114033-11024-4-git-send-email-julien.grall@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481114033-11024-1-git-send-email-julien.grall@arm.com> References: <1481114033-11024-1-git-send-email-julien.grall@arm.com> Cc: Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH 03/13] xen/arm: traps: Switch from bool_t to bool X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Since commit 9202342 "xen/build: Use C99 booleans", bool_t is an alias to bool. Going forward, there is a preference to use bool rather than bool_t. Also replace 0 and 1 by true and false when relevant. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- xen/arch/arm/traps.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index ae921d7..fb07ae1 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -154,13 +154,13 @@ static void print_xen_info(void) } #ifdef CONFIG_ARM_32 -static inline bool_t is_zero_register(int reg) +static inline bool is_zero_register(int reg) { /* There is no zero register for ARM32 */ - return 0; + return false; } #else -static inline bool_t is_zero_register(int reg) +static inline bool is_zero_register(int reg) { /* * For store/load and sysreg instruction, the encoding 31 always @@ -1500,7 +1500,7 @@ static void do_trap_hypercall(struct cpu_user_regs *regs, register_t *nr, #endif } -static bool_t check_multicall_32bit_clean(struct multicall_entry *multi) +static bool check_multicall_32bit_clean(struct multicall_entry *multi) { int i; @@ -1661,7 +1661,7 @@ static void advance_pc(struct cpu_user_regs *regs, const union hsr hsr) /* Read as zero and write ignore */ static void handle_raz_wi(struct cpu_user_regs *regs, int regidx, - bool_t read, + bool read, const union hsr hsr, int min_el) { @@ -1680,7 +1680,7 @@ static void handle_raz_wi(struct cpu_user_regs *regs, /* Write only as write ignore */ static void handle_wo_wi(struct cpu_user_regs *regs, int regidx, - bool_t read, + bool read, const union hsr hsr, int min_el) { @@ -1699,7 +1699,7 @@ static void handle_wo_wi(struct cpu_user_regs *regs, /* Read only as read as zero */ static void handle_ro_raz(struct cpu_user_regs *regs, int regidx, - bool_t read, + bool read, const union hsr hsr, int min_el) {