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[192.237.175.120]) by mx.google.com with ESMTPS id m200si13463114itm.45.2016.07.28.07.55.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Jul 2016 07:55:07 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bSmfN-0002vl-UC; Thu, 28 Jul 2016 14:52:05 +0000 Received: from mail6.bemta6.messagelabs.com ([85.158.143.247]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bSmfN-0002uW-8q for xen-devel@lists.xen.org; Thu, 28 Jul 2016 14:52:05 +0000 Received: from [85.158.143.35] by server-4.bemta-6.messagelabs.com id 8E/FE-07858-41C1A975; Thu, 28 Jul 2016 14:52:04 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGLMWRWlGSWpSXmKPExsVysyfVTVdEZla 4waw1nBZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8a300eYC2ZKV3ydOZexgXG7aBcjF4eQwCZG ie2dx1khnNOMEgce7WbsYuTkYBPQlLjz+RMTiC0iIC1x7fNlRpAiZoF2Rom1/b3MIAlhgWCJt wvugdksAqoSG588ZwOxeQWcJfpnngaLSwjISZw8NhloAwcHp4CLxOtuIZCwEFDJ9JlLGScwci 9gZFjFqF6cWlSWWqRrqpdUlJmeUZKbmJmja2hgppebWlycmJ6ak5hUrJecn7uJEehfBiDYwTj 9sv8hRkkOJiVR3rDQmeFCfEn5KZUZicUZ8UWlOanFhxhlODiUJHhvSc0KFxIsSk1PrUjLzAEG GkxagoNHSYT3IUiat7ggMbc4Mx0idYpRUUqcl1caKCEAksgozYNrgwX3JUZZKWFeRqBDhHgKU otyM0tQ5V8xinMwKgnz7gAZz5OZVwI3/RXQYiagxcWxM0AWlyQipKQaGKtvK81YfNv0uHZnjZ XqySXTjZ7+rv3EXPyk48SGFToW7NPnPHlT85PnU3lc1bLVLxrmOnx/PnFHqzyTVOXSwzMTTuc vFZZp3HXeynhKi8Dh13Gqu+vfB5qt5ZkQ9ovhurv6pq1pArb8yxfVx53z2ei9V2yKPL/bury5 e+Yt39e9Zsmph/a5ZzSUWIozEg21mIuKEwHtjEmyaQIAAA== X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-14.tower-21.messagelabs.com!1469717523!26028796!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.77; banners=-,-,- X-VirusChecked: Checked Received: (qmail 8578 invoked from network); 28 Jul 2016 14:52:03 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-14.tower-21.messagelabs.com with SMTP; 28 Jul 2016 14:52:03 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6B446BB3; Thu, 28 Jul 2016 07:53:20 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.218.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 372003F21A; Thu, 28 Jul 2016 07:52:02 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Thu, 28 Jul 2016 15:51:31 +0100 Message-Id: <1469717505-8026-9-git-send-email-julien.grall@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1469717505-8026-1-git-send-email-julien.grall@arm.com> References: <1469717505-8026-1-git-send-email-julien.grall@arm.com> Cc: proskurin@sec.in.tum.de, Julien Grall , sstabellini@kernel.org, steve.capper@arm.com, wei.chen@linaro.org Subject: [Xen-devel] [RFC 08/22] xen/arm: p2m: Invalidate the TLBs when write unlocking the p2m X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Sometimes the invalidation of the TLBs can be deferred until the p2m is unlocked. This is for instance the case when multiple mappings are removed. In other case, such as shattering a superpage, an immediate flush is required. Keep track whether a flush is needed directly in the p2m_domain structure to allow serializing multiple changes. The TLBs will be invalidated when write unlocking the p2m if necessary. Also a new helper, p2m_flush_sync, has been introduced to force a synchronous TLB invalidation. Finally, replace the call to p2m_flush_tlb by p2m_flush_tlb_sync in apply_p2m_changes. Note this patch is not useful today, however follow-up patches will make advantage of it. Signed-off-by: Julien Grall --- xen/arch/arm/p2m.c | 33 ++++++++++++++++++++++++++++++++- xen/include/asm-arm/p2m.h | 11 +++++++++++ 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 6b29cf0..a6dce0c 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -52,8 +52,21 @@ static inline void p2m_write_lock(struct p2m_domain *p2m) write_lock(&p2m->lock); } +static void p2m_flush_tlb(struct p2m_domain *p2m); + static inline void p2m_write_unlock(struct p2m_domain *p2m) { + if ( p2m->need_flush ) + { + p2m->need_flush = false; + /* + * The final flush is done with the P2M write lock taken to + * to avoid someone else modify the P2M before the TLB + * invalidation has completed. + */ + p2m_flush_tlb(p2m); + } + write_unlock(&p2m->lock); } @@ -72,6 +85,11 @@ static inline int p2m_is_locked(struct p2m_domain *p2m) return rw_is_locked(&p2m->lock); } +static inline int p2m_is_write_locked(struct p2m_domain *p2m) +{ + return rw_is_write_locked(&p2m->lock); +} + void p2m_dump_info(struct domain *d) { struct p2m_domain *p2m = &d->arch.p2m; @@ -165,6 +183,19 @@ static void p2m_flush_tlb(struct p2m_domain *p2m) } /* + * Force a synchronous P2M TLB flush. + * + * Must be called with the p2m lock held. + */ +static void p2m_flush_tlb_sync(struct p2m_domain *p2m) +{ + ASSERT(p2m_is_write_locked(p2m)); + + p2m_flush_tlb(p2m); + p2m->need_flush = false; +} + +/* * Lookup the MFN corresponding to a domain's GFN. * * There are no processor functions to do a stage 2 only lookup therefore we @@ -1142,7 +1173,7 @@ static int apply_p2m_changes(struct domain *d, out: if ( flush ) { - p2m_flush_tlb(&d->arch.p2m); + p2m_flush_tlb_sync(&d->arch.p2m); ret = iommu_iotlb_flush(d, gfn_x(sgfn), nr); if ( !rc ) rc = ret; diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h index 03bfd5e..e6be3ea 100644 --- a/xen/include/asm-arm/p2m.h +++ b/xen/include/asm-arm/p2m.h @@ -51,6 +51,17 @@ struct p2m_domain { /* Indicate if it is required to clean the cache when writing an entry */ bool_t clean_pte; + /* + * P2M updates may required TLBs to be flushed (invalidated). + * + * Flushes may be deferred by setting 'need_flush' and then flushing + * when the p2m write lock is released. + * + * If an immediate flush is required (e.g, if a super page is + * shattered), call p2m_tlb_flush_sync(). + */ + bool need_flush; + /* Gather some statistics for information purposes only */ struct { /* Number of mappings at each p2m tree level */