From patchwork Wed Jul 27 13:58:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 72874 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp328901qga; Wed, 27 Jul 2016 07:01:32 -0700 (PDT) X-Received: by 10.107.9.231 with SMTP id 100mr33304601ioj.196.1469628092734; Wed, 27 Jul 2016 07:01:32 -0700 (PDT) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id 133si7506717ioz.44.2016.07.27.07.01.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 27 Jul 2016 07:01:32 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bSPMF-0006KQ-M2; Wed, 27 Jul 2016 13:58:47 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bSPMD-0006It-W7 for xen-devel@lists.xen.org; Wed, 27 Jul 2016 13:58:46 +0000 Received: from [85.158.137.68] by server-1.bemta-3.messagelabs.com id 84/48-17152-51EB8975; Wed, 27 Jul 2016 13:58:45 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrKLMWRWlGSWpSXmKPExsVysyfVTVdk34x wg/+bNSyWfFzM4sDocXT3b6YAxijWzLyk/IoE1oyOjQfYCmbLVsw49ZutgbFLoouRi0NIYCOj xP35L5khnNOMEtMvz2btYuTkYBPQlLjz+RMTiC0iIC1x7fNlRhCbWWAho8Tb3SEgtrBApsSJP WvYQGwWAVWJzp0XgAZxcPAKOEss+xMKEpYQkJM4eWwy2EhOAReJ3kuXwMYIAZWc+buRdQIj9w JGhlWM6sWpRWWpRbrmeklFmekZJbmJmTm6hgbGermpxcWJ6ak5iUnFesn5uZsYgd5lAIIdjI3 fnQ4xSnIwKYnyLnKcES7El5SfUpmRWJwRX1Sak1p8iFGGg0NJgvfmHqCcYFFqempFWmYOMMxg 0hIcPEoivDN3A6V5iwsSc4sz0yFSpxgVpcR5BfYCJQRAEhmleXBtsNC+xCgrJczLCHSIEE9Ba lFuZgmq/CtGcQ5GJWHeHyDbeTLzSuCmvwJazAS0uDgWbHFJIkJKqoFxeuO0nWyTlba8X1i7ve StnYy6YXpQc4I4266b+8452dvfXrsiZl3j5s5YlePC2+Ov+j9vMHvGN6XWfgJ3VeQXJqs3+ru ttr9LfH7tmSvfJ8UVK85e9Zd8tiN7q4n30Yior3uVxW9PcW5a6S35a15hdPzHy1+dBE+tvXxX oopjw5GLJitmtl16oMRSnJFoqMVcVJwIAJyJOsRoAgAA X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-11.tower-31.messagelabs.com!1469627923!26439866!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.77; banners=-,-,- X-VirusChecked: Checked Received: (qmail 24624 invoked from network); 27 Jul 2016 13:58:43 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-11.tower-31.messagelabs.com with SMTP; 27 Jul 2016 13:58:43 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F5B528; Wed, 27 Jul 2016 06:59:59 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.218.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C6D333F25F; Wed, 27 Jul 2016 06:58:41 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Wed, 27 Jul 2016 14:58:25 +0100 Message-Id: <1469627910-3902-5-git-send-email-julien.grall@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1469627910-3902-1-git-send-email-julien.grall@arm.com> References: <1469627910-3902-1-git-send-email-julien.grall@arm.com> Cc: sstabellini@kernel.org, steve.capper@arm.com, Julien Grall , shannon.zhao@linaro.org, shankerd@codeaurora.org, wei.chen@linaro.org Subject: [Xen-devel] [PATCH v3 4/9] xen/arm: gic: set_type: Pass the type in parameter rather than in desc->arch.type X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" A follow-up patch will not store the type in desc->arch.type. Also, the callback prototype is more logical. Signed-off-by: Julien Grall Reviewed-by: Stefano Stabellini --- Changes in v3: - Add Stefano's reviewed-by Changes in v2: - gic_set_irq_type has been dropped by mistake in gic_route_irq_to_xen. Re-add it! --- xen/arch/arm/gic-v2.c | 3 +-- xen/arch/arm/gic-v3.c | 3 +-- xen/arch/arm/gic.c | 10 +++++----- xen/include/asm-arm/gic.h | 4 ++-- 4 files changed, 9 insertions(+), 11 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 69ed72d..9bd9d0b 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -236,11 +236,10 @@ static unsigned int gicv2_read_irq(void) return (readl_gicc(GICC_IAR) & GICC_IA_IRQ); } -static void gicv2_set_irq_type(struct irq_desc *desc) +static void gicv2_set_irq_type(struct irq_desc *desc, unsigned int type) { uint32_t cfg, actual, edgebit; unsigned int irq = desc->irq; - unsigned int type = desc->arch.type; spin_lock(&gicv2.lock); /* Set edge / level */ diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 781f25c..b8be395 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -471,12 +471,11 @@ static inline uint64_t gicv3_mpidr_to_affinity(int cpu) MPIDR_AFFINITY_LEVEL(mpidr, 0)); } -static void gicv3_set_irq_type(struct irq_desc *desc) +static void gicv3_set_irq_type(struct irq_desc *desc, unsigned int type) { uint32_t cfg, actual, edgebit; void __iomem *base; unsigned int irq = desc->irq; - unsigned int type = desc->arch.type; /* SGI's are always edge-triggered not need to call GICD_ICFGR0 */ ASSERT(irq >= NR_GIC_SGI); diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index c63c862..b9371a7 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -96,12 +96,12 @@ void gic_restore_state(struct vcpu *v) gic_restore_pending_irqs(v); } -static void gic_set_irq_type(struct irq_desc *desc) +static void gic_set_irq_type(struct irq_desc *desc, unsigned int type) { ASSERT(spin_is_locked(&desc->lock)); - ASSERT(desc->arch.type != IRQ_TYPE_INVALID); + ASSERT(type != IRQ_TYPE_INVALID); - gic_hw_ops->set_irq_type(desc); + gic_hw_ops->set_irq_type(desc, type); } static void gic_set_irq_priority(struct irq_desc *desc, unsigned int priority) @@ -121,7 +121,7 @@ void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority) desc->handler = gic_hw_ops->gic_host_irq_type; - gic_set_irq_type(desc); + gic_set_irq_type(desc, desc->arch.type); gic_set_irq_priority(desc, priority); } @@ -154,7 +154,7 @@ int gic_route_irq_to_guest(struct domain *d, unsigned int virq, desc->handler = gic_hw_ops->gic_guest_irq_type; set_bit(_IRQ_GUEST, &desc->status); - gic_set_irq_type(desc); + gic_set_irq_type(desc, desc->arch.type); gic_set_irq_priority(desc, priority); p->desc = desc; diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 3f39f79..2214e87 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -328,8 +328,8 @@ struct gic_hw_operations { void (*deactivate_irq)(struct irq_desc *irqd); /* Read IRQ id and Ack */ unsigned int (*read_irq)(void); - /* Set IRQ type - type is taken from desc->arch.type */ - void (*set_irq_type)(struct irq_desc *desc); + /* Set IRQ type */ + void (*set_irq_type)(struct irq_desc *desc, unsigned int type); /* Set IRQ priority */ void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority); /* Send SGI */