From patchwork Tue Jun 7 16:48:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 69561 Delivered-To: patch@linaro.org Received: by 10.140.106.246 with SMTP id e109csp2075599qgf; Tue, 7 Jun 2016 09:50:36 -0700 (PDT) X-Received: by 10.31.228.133 with SMTP id b127mr196251vkh.90.1465318219799; Tue, 07 Jun 2016 09:50:19 -0700 (PDT) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id y77si6903269vky.187.2016.06.07.09.50.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 07 Jun 2016 09:50:19 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bAKBa-0000LO-D8; Tue, 07 Jun 2016 16:49:02 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bAKBZ-0000Hk-3J for xen-devel@lists.xen.org; Tue, 07 Jun 2016 16:49:01 +0000 Received: from [85.158.139.211] by server-10.bemta-5.messagelabs.com id 36/10-11369-CFAF6575; Tue, 07 Jun 2016 16:49:00 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRWlGSWpSXmKPExsVysyfVTffPr7B wg7ONMhZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8bzeZ+YCp6zV0xt3cjYwLiTrYuRk0NIYCOj xM8Opy5GLiD7NKPEvI55zCAJNgFNiTufPzGB2CIC0hLXPl9mBCliFpjHKHFm4U52kISwgL/E4 tdPWUFsFgFVibv/F4HZvALOEld3rmIEsSUE5CROHpsMFucUcJF4+fwlC8RmZ4kHDbuYJzByL2 BkWMWoXpxaVJZapGupl1SUmZ5RkpuYmaNraGCql5taXJyYnpqTmFSsl5yfu4kR6F8GINjBuLb V+RCjJAeTkijv029h4UJ8SfkplRmJxRnxRaU5qcWHGGU4OJQkeGf8BMoJFqWmp1akZeYAAw0m LcHBoyTCm/UOKM1bXJCYW5yZDpE6xajLseDH7bVMQix5+XmpUuK8OiBFAiBFGaV5cCNgQX+JU VZKmJcR6CghnoLUotzMElT5V4ziHIxKwrweIJfwZOaVwG16BXQEE9ARLF/BjihJREhJNTAqf7 RQeqkoEmCexrRVpbojLO+O8MqE9rhjWQ6K13V5LmfPkdgVtsQq97Xf17ANsYITP+uEsj2w2La rr41LPEfJe94Jl+h3VqeE3UJ3eZ2YbnhNT2tCi/Gustezt9ypbf/Ef7M0J0zhtvy646rnxOUf zPUpyxLYesLwO4N4hQln4C/j7cwdz5RYijMSDbWYi4oTAWIGM0V1AgAA X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-3.tower-206.messagelabs.com!1465318139!40024432!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.46; banners=-,-,- X-VirusChecked: Checked Received: (qmail 40269 invoked from network); 7 Jun 2016 16:49:00 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-3.tower-206.messagelabs.com with SMTP; 7 Jun 2016 16:49:00 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 35B7C2F; Tue, 7 Jun 2016 09:49:34 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.215.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7D03C3F246; Tue, 7 Jun 2016 09:48:58 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Tue, 7 Jun 2016 17:48:40 +0100 Message-Id: <1465318123-3090-6-git-send-email-julien.grall@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465318123-3090-1-git-send-email-julien.grall@arm.com> References: <1465318123-3090-1-git-send-email-julien.grall@arm.com> Cc: sstabellini@kernel.org, wei.chen@arm.com, steve.capper@arm.com, Julien Grall , shannon.zhao@linaro.org, shankerd@codeaurora.org Subject: [Xen-devel] [RFC 5/8] xen/arm: gic: Document how gic_set_irq_type should be called X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Changing the value of Int_config is UNPREDICTABLE when the corresponding interrupt is not disabled. The driver is assuming the interrupt will be disabled by the caller of gic_set_irq_type. Add an ASSERT to ensure it. Signed-off-by: Julien Grall --- xen/arch/arm/gic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 8b992d8..27cd177 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -96,8 +96,14 @@ void gic_restore_state(struct vcpu *v) gic_restore_pending_irqs(v); } +/* desc->irq needs to be disabled before calling this function */ static void gic_set_irq_type(struct irq_desc *desc, unsigned int type) { + /* + * IRQ must be disabled before configuring it (see 4.3.13 in ARM IHI + * 0048B.b). We rely on the caller to do it. + */ + ASSERT(test_bit(_IRQ_DISABLED, &desc->status)); ASSERT(spin_is_locked(&desc->lock)); ASSERT(type != IRQ_TYPE_INVALID);