From patchwork Wed Nov 28 16:49:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 152312 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1321040ljp; Wed, 28 Nov 2018 08:52:00 -0800 (PST) X-Google-Smtp-Source: AFSGD/VjKkURdZai5uTd/bo3MongOM3PqAiuk6DX5c3PgP5JCdV66p86XPj5bGngyGZetmiUh79m X-Received: by 2002:a25:c512:: with SMTP id v18-v6mr20019526ybe.4.1543423920789; Wed, 28 Nov 2018 08:52:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543423920; cv=none; d=google.com; s=arc-20160816; b=QKFWMd1J3KpWZwSfWpw8yp9kkSpX3Ng2jzcXhr7LHuJFkopJPB+VRxMtRWb3J0TWKA EcH1cmZ780wUz1+TLvVfI4K9STY/HtjUqL0DYoHyulO1RPMb2ywharB4C/wbhjs+TlNM bOuKxy0gBPK7Xg+90gQiAT0eWjjP0Jxf/SP3lcTQa5Hj82ENO5dGFT6yYc+03ZLBskxT Z81xVka4EbIsFqpCWrWFJxXFTlDKBFX6ssKQ1TdadP9wYpL63VuEmwz2n7fQnMX7MN3C QOTix/rfN0RiiUBF5FwAsANaFHibXtBdqvg/ZdoVOLOPthEJfQDb6wGTiGB10mJ0zkdX 13sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:message-id:date:to:from; bh=DrGfhZ4XsmlpuMGGixtUNZKRTO6DVixbhszHH60EL+8=; b=LbsFdTJneiWQx3gMooKp/G+FD23EC4x4D65RFqkNMR97sYvRCRMpk7hjBZsHdNu4My 1DJ2coC8P4ZosIoE2uYuM5/+riTKcBwcpj7ZAXdBy7WVH32KERl40yUKIzv5G1qjBdrp etrVIH7JzdAJJ0ciHQ2TvlRQzsdQecIR5GMBg+GNoONPzdXKWaWMXYvRFdM6CFcae7ef ZPWdVSJygRciA+lp5MkAZmx/Ch+LCHCfNq5uh2ByCiCMqmtmmTXI2xe/PAQcMSYSJWjl NQILzm02tujrfPh7vAglCxf/ajWy+UVUUXvf2is7y9xivlpftGsjrUWPILFCCy66fjN/ zG3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id l136-v6si5119252ywl.243.2018.11.28.08.52.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 28 Nov 2018 08:52:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS326-0000qZ-1c; Wed, 28 Nov 2018 16:49:50 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1gS324-0000qL-M9 for xen-devel@lists.xenproject.org; Wed, 28 Nov 2018 16:49:48 +0000 X-Inumbo-ID: 9d772be6-f32d-11e8-9876-12d6303a7972 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTP id 9d772be6-f32d-11e8-9876-12d6303a7972; Wed, 28 Nov 2018 16:49:47 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 568C7382C; Wed, 28 Nov 2018 08:49:47 -0800 (PST) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 69F963F575; Wed, 28 Nov 2018 08:49:46 -0800 (PST) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 28 Nov 2018 16:49:31 +0000 Message-Id: <20181128164939.8329-1-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 Subject: [Xen-devel] [PATCH for-4.12 0/8] xen/arm: Workaround for Cortex-A76 erratum 1165522 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Hi all, Early version of Cortex-A76 can end-up with corrupt TLBs if they speculate an AT instruction while the S1/S2 system registers are in an inconsistent state. This can happen during guest context switch and when invalidating the TLBs for other than the current VMID. The workaround implemented in Xen will: - Use an empty stage-2 with a reserved VMID while context switching between 2 guests - Use an empty stage-2 with the VMID where TLBs need to be flushed Cheers, Julien Grall (8): xen/arm: Only set necessary flags when initializing HCR_EL2 xen/arm: p2m: Provide an helper to generate the VTTBR xen/arm: p2m: Introduce an helper to allocate the root page-table xen/arm: domain_build: Don't switch to the guest P2M when copying data xen/arm: p2m: Only use isb() when it is necessary xen/arm: Implement workaround for Cortex-A76 erratum 1165522 xen/arm: p2m: Clean-up headers included and order them alphabetically DO NOT APPLY Allow testing the new AT speculate workaround code docs/misc/arm/silicon-errata.txt | 1 + xen/arch/arm/cpuerrata.c | 16 +++++ xen/arch/arm/domain.c | 8 ++- xen/arch/arm/domain_build.c | 13 ---- xen/arch/arm/p2m.c | 138 ++++++++++++++++++++++++++++++++------- xen/arch/arm/traps.c | 8 ++- xen/include/asm-arm/cpufeature.h | 3 +- xen/include/asm-arm/processor.h | 2 + 8 files changed, 146 insertions(+), 43 deletions(-)