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[209.85.220.65]) by mx.google.com with SMTPS id b10sor8304906pld.30.2020.04.22.07.35.48 for (Google Transport Security); Wed, 22 Apr 2020 07:35:48 -0700 (PDT) Received-SPF: pass (google.com: domain of sumit.garg@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="yyed+/4a"; spf=pass (google.com: domain of sumit.garg@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=sumit.garg@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=180Bkv/qjzdgL0LvJGsWXI0D1VeYXfZQprg4uqmAybw=; b=yyed+/4aVZbLoy75We2VsTD3hTTgkMVS/pwdPtmCW3rNipE68dukIqyNIrpjzH5B2/ 5itqWGIYyk/E1b0vuER6Bik/mWL8tVJBP1bG9k9jjjWjSuoZysBTu14O5fDoMNeKLFoY S4ERqmA5AfEsA8l4/OwI9TDodt3KpxdGAjLs8gs2ytVc9gHXAD0yb8zcC8R8TEj4pdX3 T+InU+nbncHMm0nIksQ2tRxl7uhC6DjiYacLGrQ6uammPAq5cmvT3k64pntHTsmLA8Ap HY9QjDFY4xOBNYoFYVy0+63isyLlYv6BnesMRXqqi/3wB2Q5lvKB+OggMPlOHmzFIVdi C95w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=180Bkv/qjzdgL0LvJGsWXI0D1VeYXfZQprg4uqmAybw=; b=R4JSZDufA6zOAiqeeBxoo0f1W6JufL6byyYpR/wn8ucfwTMNo8XVCOAiUZ3X8yqlfA Abrl9FmZ7zl5c6Jp3JC2o2PmKLPb/Vl8aEiBKY0CCxOsuhgq3VIhXd/Ub4+BY1nQVSmx Wv9wdRIhH0rNWMSi8CzyA/IJd5zsjN5/SDKOgK7rr4BBNDmVGegcOcQ6fSJDjx0khf8k iBuV3BR0g8S3mQpmO2HxpYhjbsQB9DuHSY7vntFyfiyNcm6XnbqaG6CHdFRCXWK9SKNC FKTAK8qwBW4Qr/+h3qmMPCiTEoV/8NtLvS0aqza2IadTGrAcYU1mwJzD81aozj/ahLmg zLIw== X-Gm-Message-State: AGi0PubJpUi5PSTQywogmPsnCF/HyxVT+c939hLgD8dXH8pgSzcXbP3/ A+EDTv4JQoik0CV/hF4MyNihsULZEP2+cA== X-Google-Smtp-Source: APiQypKyfc/eB08QaCF4iwQqcdDljMN8SnbRKdNHLzs0Jy7O2Y5eYfppCHOWF3stNZSisb5FUwsgbw== X-Received: by 2002:a17:902:9a82:: with SMTP id w2mr26859724plp.117.1587566148163; Wed, 22 Apr 2020 07:35:48 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([117.252.71.186]) by smtp.gmail.com with ESMTPSA id j13sm5723573pje.1.2020.04.22.07.35.43 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 22 Apr 2020 07:35:47 -0700 (PDT) From: Sumit Garg To: daniel.thompson@linaro.org Cc: patches@linaro.org, Sumit Garg Subject: [RFC 0/4] arm64: Introduce new IPI as IPI_CALL_NMI_FUNC Date: Wed, 22 Apr 2020 20:05:19 +0530 Message-Id: <1587566123-9935-1-git-send-email-sumit.garg@linaro.org> X-Mailer: git-send-email 2.7.4 With pseudo NMIs support available its possible to configure SGIs to be triggered as pseudo NMIs running in NMI context. And kernel features such as kgdb relies on NMI support to round up CPUs which are stuck in hard lockup state with interrupts disabled. This patch-set adds support for IPI_CALL_NMI_FUNC which can be triggered as a pseudo NMI which in turn is leveraged via kgdb to round up CPUs. After this patch-set we should be able to get a backtrace for a CPU stuck in HARDLOCKUP. Have a look at an example below from a testcase run on Developerbox: $ echo HARDLOCKUP > /sys/kernel/debug/provoke-crash/DIRECT # Enter kdb via Magic SysRq [11]kdb> btc btc: cpu status: Currently on cpu 11 Available cpus: 0-10(I), 11, 12(I), 13, 14-23(I) Stack traceback for pid 623 0xffff00086a644600 623 622 1 13 R 0xffff00086a644fc0 bash CPU: 13 PID: 623 Comm: bash Not tainted 5.7.0-rc2 #27 Hardware name: Socionext SynQuacer E-series DeveloperBox, BIOS build #73 Apr 6 2020 Call trace: dump_backtrace+0x0/0x198 show_stack+0x18/0x28 dump_stack+0xb8/0x100 kgdb_cpu_enter+0x5c0/0x5f8 kgdb_nmicallback+0xa0/0xa8 handle_IPI+0x190/0x200 gic_handle_irq+0x2b8/0x2d8 el1_irq+0xcc/0x180 lkdtm_HARDLOCKUP+0x8/0x18 direct_entry+0x124/0x1c0 full_proxy_write+0x60/0xb0 __vfs_write+0x1c/0x48 vfs_write+0xe4/0x1d0 ksys_write+0x6c/0xf8 __arm64_sys_write+0x1c/0x28 el0_svc_common.constprop.0+0x74/0x1f0 do_el0_svc+0x24/0x90 el0_sync_handler+0x178/0x2b8 el0_sync+0x158/0x180 Sumit Garg (4): arm64: smp: Introduce a new IPI as IPI_CALL_NMI_FUNC irqchip/gic-v3: Add support to handle SGI as pseudo NMI irqchip/gic-v3: Enable arch specific IPI as pseudo NMI arm64: kgdb: Round up cpus using IPI_CALL_NMI_FUNC arch/arm64/include/asm/hardirq.h | 2 +- arch/arm64/include/asm/smp.h | 1 + arch/arm64/kernel/kgdb.c | 12 ++++++++++++ arch/arm64/kernel/smp.c | 36 +++++++++++++++++++++++++++++++++++- drivers/irqchip/irq-gic-v3.c | 36 +++++++++++++++++++++++++++++++----- 5 files changed, 80 insertions(+), 7 deletions(-) -- 2.7.4