diff mbox series

[4/4] net:phy: fix phy_reset_after_clk_enable()

Message ID CY4PR1701MB18784D5BA799B00DB3B722CEDF160@CY4PR1701MB1878.namprd17.prod.outlook.com
State New
Headers show
Series Restore and fix PHY reset for SMSC LAN8720 | expand

Commit Message

Badel, Laurent Oct. 27, 2020, 11:29 p.m. UTC 
Subject: [PATCH 4/4] net:phy: fix phy_reset_after_clk_enable()

Description: Resetting PHY chip during operation has the effect of
reverting all configuration registers to default. Therefore,
fully re-configure the PHY after a reset.

Also, avoid resetting the PHY if the reset is already asserted,
as this would deassert the reset which might be unexpected for
the entity that previously asserted it.

Signed-off-by: Laurent Badel <laurentbadel@eaton.com>
---
 drivers/net/phy/phy_device.c | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

--
2.17.1



-----------------------------
Eaton Industries Manufacturing GmbH ~ Registered place of business: Route de la Longeraie 7, 1110, Morges, Switzerland 

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diff mbox series

Patch

diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index 5dab6be6fc38..85678b1600c0 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -1801,7 +1801,7 @@  int phy_loopback(struct phy_device *phydev, bool enable)
 EXPORT_SYMBOL(phy_loopback);

 /**
- * phy_reset_after_clk_enable - perform a PHY reset if needed
+ * phy_reset_after_clk_enable - perform a PHY reset if needed and reconfigure
  * @phydev: target phy_device struct
  *
  * Description: Some PHYs are known to need a reset after their refclk was
@@ -1811,15 +1811,29 @@  EXPORT_SYMBOL(phy_loopback);
  */
 int phy_reset_after_clk_enable(struct phy_device *phydev)
 {
+	int ret;
+
 	if (!phydev || !phydev->drv)
 		return -ENODEV;

-	if (phydev->drv->flags & PHY_RST_AFTER_CLK_EN) {
+	if ((phydev->drv->flags & PHY_RST_AFTER_CLK_EN) &&
+	    !phy_device_reset_status(phydev)) {
+
 		phy_device_reset(phydev, 1);
-		phy_device_reset(phydev, 0);
+		/* phy_init_hw will bring the phy out of reset
+		 * and run its config_init method.
+		 */
+		ret = phy_init_hw(phydev);
+		if (ret < 0)
+			return ret;
+
+		/* re-configure interrupts if needed */
+		if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
+			phy_free_interrupt(phydev);
+			phy_request_interrupt(phydev);
+		}
 		return 1;
 	}
-
 	return 0;
 }
 EXPORT_SYMBOL(phy_reset_after_clk_enable);