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[5.12.16.165]) by smtp.gmail.com with ESMTPSA id a185sm5623947pfd.70.2021.04.16.16.43.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Apr 2021 16:43:23 -0700 (PDT) From: Vladimir Oltean To: Jakub Kicinski , "David S. Miller" , netdev@vger.kernel.org, Po Liu Cc: Claudiu Manoil , Alex Marginean , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Russell King - ARM Linux admin , Andrew Lunn , Michael Walle , Vladimir Oltean Subject: [PATCH net-next 2/5] dt-bindings: net: fsl: enetc: add the IERB documentation Date: Sat, 17 Apr 2021 02:42:22 +0300 Message-Id: <20210416234225.3715819-3-olteanv@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210416234225.3715819-1-olteanv@gmail.com> References: <20210416234225.3715819-1-olteanv@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Vladimir Oltean Mention the required compatible string and base address for the Integrated Endpoint Register Block node. Signed-off-by: Vladimir Oltean --- .../devicetree/bindings/net/fsl-enetc.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/net/fsl-enetc.txt b/Documentation/devicetree/bindings/net/fsl-enetc.txt index b7034ccbc1bd..9b9a3f197e2d 100644 --- a/Documentation/devicetree/bindings/net/fsl-enetc.txt +++ b/Documentation/devicetree/bindings/net/fsl-enetc.txt @@ -102,3 +102,18 @@ Example: full-duplex; }; }; + +* Integrated Endpoint Register Block bindings + +Optionally, the fsl_enetc driver can probe on the Integrated Endpoint Register +Block, which preconfigures the FIFO limits for the ENETC ports. This is a node +with the following properties: + +- reg : Specifies the address in the SoC memory space. +- compatible : Must be "fsl,ls1028a-enetc-ierb". + +Example: + ierb@1f0800000 { + compatible = "fsl,ls1028a-enetc-ierb"; + reg = <0x01 0xf0800000 0x0 0x10000>; + };