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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id b4sm587797ile.13.2020.11.19.14.40.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Nov 2020 14:40:49 -0800 (PST) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: evgreen@chromium.org, subashab@codeaurora.org, cpratapa@codeaurora.org, bjorn.andersson@linaro.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 3/3] net: ipa: use config data for clocking Date: Thu, 19 Nov 2020 16:40:41 -0600 Message-Id: <20201119224041.16066-4-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201119224041.16066-1-elder@linaro.org> References: <20201119224041.16066-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Stop assuming a fixed IPA core clock rate and interconnect bandwidths. Use the configuration data defined for these things instead. Get rid of the previously-used constants. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_clock.c | 40 ++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 20 deletions(-) -- 2.20.1 diff --git a/drivers/net/ipa/ipa_clock.c b/drivers/net/ipa/ipa_clock.c index ef343669280ef..9dcf16f399b7a 100644 --- a/drivers/net/ipa/ipa_clock.c +++ b/drivers/net/ipa/ipa_clock.c @@ -30,18 +30,6 @@ * An IPA clock reference must be held for any access to IPA hardware. */ -#define IPA_CORE_CLOCK_RATE (75UL * 1000 * 1000) /* Hz */ - -/* Interconnect path bandwidths (each times 1000 bytes per second) */ -#define IPA_MEMORY_AVG (80 * 1000) /* 80 MBps */ -#define IPA_MEMORY_PEAK (600 * 1000) - -#define IPA_IMEM_AVG (80 * 1000) -#define IPA_IMEM_PEAK (350 * 1000) - -#define IPA_CONFIG_AVG (40 * 1000) -#define IPA_CONFIG_PEAK (40 * 1000) - /** * struct ipa_clock - IPA clocking information * @count: Clocking reference count @@ -116,18 +104,25 @@ static void ipa_interconnect_exit(struct ipa_clock *clock) /* Currently we only use one bandwidth level, so just "enable" interconnects */ static int ipa_interconnect_enable(struct ipa *ipa) { + const struct ipa_interconnect_data *data; struct ipa_clock *clock = ipa->clock; int ret; - ret = icc_set_bw(clock->memory_path, IPA_MEMORY_AVG, IPA_MEMORY_PEAK); + data = &clock->interconnect_data[IPA_INTERCONNECT_MEMORY]; + ret = icc_set_bw(clock->memory_path, data->average_rate, + data->peak_rate); if (ret) return ret; - ret = icc_set_bw(clock->imem_path, IPA_IMEM_AVG, IPA_IMEM_PEAK); + data = &clock->interconnect_data[IPA_INTERCONNECT_IMEM]; + ret = icc_set_bw(clock->memory_path, data->average_rate, + data->peak_rate); if (ret) goto err_memory_path_disable; - ret = icc_set_bw(clock->config_path, IPA_CONFIG_AVG, IPA_CONFIG_PEAK); + data = &clock->interconnect_data[IPA_INTERCONNECT_CONFIG]; + ret = icc_set_bw(clock->memory_path, data->average_rate, + data->peak_rate); if (ret) goto err_imem_path_disable; @@ -144,6 +139,7 @@ static int ipa_interconnect_enable(struct ipa *ipa) /* To disable an interconnect, we just its bandwidth to 0 */ static int ipa_interconnect_disable(struct ipa *ipa) { + const struct ipa_interconnect_data *data; struct ipa_clock *clock = ipa->clock; int ret; @@ -162,9 +158,13 @@ static int ipa_interconnect_disable(struct ipa *ipa) return 0; err_imem_path_reenable: - (void)icc_set_bw(clock->imem_path, IPA_IMEM_AVG, IPA_IMEM_PEAK); + data = &clock->interconnect_data[IPA_INTERCONNECT_IMEM]; + (void)icc_set_bw(clock->imem_path, data->average_rate, + data->peak_rate); err_memory_path_reenable: - (void)icc_set_bw(clock->memory_path, IPA_MEMORY_AVG, IPA_MEMORY_PEAK); + data = &clock->interconnect_data[IPA_INTERCONNECT_MEMORY]; + (void)icc_set_bw(clock->memory_path, data->average_rate, + data->peak_rate); return ret; } @@ -273,10 +273,10 @@ ipa_clock_init(struct device *dev, const struct ipa_clock_data *data) return ERR_CAST(clk); } - ret = clk_set_rate(clk, IPA_CORE_CLOCK_RATE); + ret = clk_set_rate(clk, data->core_clock_rate); if (ret) { - dev_err(dev, "error %d setting core clock rate to %lu\n", - ret, IPA_CORE_CLOCK_RATE); + dev_err(dev, "error %d setting core clock rate to %u\n", + ret, data->core_clock_rate); goto err_clk_put; }