@@ -339,9 +339,12 @@ static void ipa_hardware_config(struct ipa *ipa)
val = u32_encode_bits(granularity, AGGR_GRANULARITY);
iowrite32(val, ipa->reg_virt + IPA_REG_COUNTER_CFG_OFFSET);
- /* Disable hashed IPv4 and IPv6 routing and filtering for IPA v4.2 */
- if (ipa->version == IPA_VERSION_4_2)
- iowrite32(0, ipa->reg_virt + IPA_REG_FILT_ROUT_HASH_EN_OFFSET);
+ /* IPA v4.2 does not support hashed tables, so disable them */
+ if (ipa->version == IPA_VERSION_4_2) {
+ u32 offset = ipa_reg_filt_rout_hash_en_offset(ipa->version);
+
+ iowrite32(0, ipa->reg_virt + offset);
+ }
/* Enable dynamic clock division */
ipa_hardware_dcd_config(ipa);
@@ -151,8 +151,13 @@ static inline u32 ipa_reg_state_aggr_active_offset(enum ipa_version version)
}
/* ipa->available defines the valid bits in the STATE_AGGR_ACTIVE register */
-/* The next register is present for IPA v4.2 and above */
-#define IPA_REG_FILT_ROUT_HASH_EN_OFFSET 0x00000148
+static inline u32 ipa_reg_filt_rout_hash_en_offset(enum ipa_version version)
+{
+ if (version == IPA_VERSION_3_5_1)
+ return 0x000008c;
+
+ return 0x0000148;
+}
static inline u32 ipa_reg_filt_rout_hash_flush_offset(enum ipa_version version)
{
For IPA v3.5.1, the IPA filter/routing hash enable register actually does exist, but it is at offset 0x8c into the IPA register space. For newer versions of IPA it is at offset 0x148. Define a new inline function ipa_reg_filt_rout_hash_en_offset() to return the appropriate value for a given version of IPA hardware. Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ipa/ipa_main.c | 9 ++++++--- drivers/net/ipa/ipa_reg.h | 9 +++++++-- 2 files changed, 13 insertions(+), 5 deletions(-) -- 2.20.1