From patchwork Tue Nov 10 09:48:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ido Schimmel X-Patchwork-Id: 321982 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 882F8C61DD8 for ; Tue, 10 Nov 2020 09:51:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F298C20780 for ; Tue, 10 Nov 2020 09:51:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731114AbgKJJui (ORCPT ); Tue, 10 Nov 2020 04:50:38 -0500 Received: from wout3-smtp.messagingengine.com ([64.147.123.19]:38411 "EHLO wout3-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726467AbgKJJud (ORCPT ); Tue, 10 Nov 2020 04:50:33 -0500 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.west.internal (Postfix) with ESMTP id 707A2514; Tue, 10 Nov 2020 04:50:32 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Tue, 10 Nov 2020 04:50:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=n6S3mJR7nECMWWNumQQiL/YstAEvycM/xAqQ/0yr9NU=; b=bl4YsInd fYtq29Epj/MlJzJ3+napcCK5iUWsm3lgoayYaCeLh3P8M6PNpsZJCz3vjHfVWL55 WCbOYFvRKwUmp0B/7YG058KruWKcHdwi0bHsm16caPVNHSM7msyAYjNpZZsD4VHK QPADvktPH22l/tOl6ws7IRIfQcmFynNw+f69zFTmAss1LtdLljAV/gn7DxEimdC2 58FTP64yZH6mAxCeBZZMmDMhcCDtL1UODwfumsqprpXvbBZK2h2yPvef9vdx4+8I z/RzDvB5hZHsVATotfBnLFm6aURgSlxJ2GzinjWBZbxBKTY2pcvIlQ7m3rvPj5Z1 0uidilRXfEp41Q== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedujedruddujedgtdekucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomhepkfguohcuufgthhhimhhmvghluceoihguohhstghhsehiugho shgthhdrohhrgheqnecuggftrfgrthhtvghrnhepudetieevffffveelkeeljeffkefhke ehgfdtffethfelvdejgffghefgveejkefhnecukfhppeekgedrvddvledrudehgedrudeg jeenucevlhhushhtvghrufhiiigvpeeknecurfgrrhgrmhepmhgrihhlfhhrohhmpehiug hoshgthhesihguohhstghhrdhorhhg X-ME-Proxy: Received: from shredder.mtl.com (igld-84-229-154-147.inter.net.il [84.229.154.147]) by mail.messagingengine.com (Postfix) with ESMTPA id C8CD53280060; Tue, 10 Nov 2020 04:50:30 -0500 (EST) From: Ido Schimmel To: netdev@vger.kernel.org Cc: davem@davemloft.net, kuba@kernel.org, jiri@nvidia.com, mlxsw@nvidia.com, Ido Schimmel Subject: [PATCH net-next 11/15] mlxsw: spectrum_router: Prepare work context for possible bulking Date: Tue, 10 Nov 2020 11:48:56 +0200 Message-Id: <20201110094900.1920158-12-idosch@idosch.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201110094900.1920158-1-idosch@idosch.org> References: <20201110094900.1920158-1-idosch@idosch.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Jiri Pirko For XMDR register it is possible to carry multiple FIB entry operations in a single write. However the FW does not restrict mixing the types of operations, make the code easier and indicate the bulking is ok only in case the bulk contains FIB operations of the same family and event. Signed-off-by: Jiri Pirko Signed-off-by: Ido Schimmel --- .../net/ethernet/mellanox/mlxsw/spectrum_router.c | 15 +++++++++++++-- .../net/ethernet/mellanox/mlxsw/spectrum_router.h | 1 + 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c index ede67a28f278..39c04e45f253 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c @@ -6191,14 +6191,25 @@ static void mlxsw_sp_router_fib_event_work(struct work_struct *work) struct mlxsw_sp_router *router = container_of(work, struct mlxsw_sp_router, fib_event_work); struct mlxsw_sp_fib_entry_op_ctx op_ctx = {}; struct mlxsw_sp *mlxsw_sp = router->mlxsw_sp; - struct mlxsw_sp_fib_event *fib_event, *tmp; + struct mlxsw_sp_fib_event *next_fib_event; + struct mlxsw_sp_fib_event *fib_event; LIST_HEAD(fib_event_queue); spin_lock_bh(&router->fib_event_queue_lock); list_splice_init(&router->fib_event_queue, &fib_event_queue); spin_unlock_bh(&router->fib_event_queue_lock); - list_for_each_entry_safe(fib_event, tmp, &fib_event_queue, list) { + list_for_each_entry_safe(fib_event, next_fib_event, + &fib_event_queue, list) { + /* Check if the next entry in the queue exists and it is + * of the same type (family and event) as the currect one. + * In that case it is permitted to do the bulking + * of multiple FIB entries to a single register write. + */ + op_ctx.bulk_ok = !list_is_last(&fib_event->list, &fib_event_queue) && + fib_event->family == next_fib_event->family && + fib_event->event == next_fib_event->event; + switch (fib_event->family) { case AF_INET: mlxsw_sp_router_fib4_event_process(mlxsw_sp, &op_ctx, diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h index 2f700ad74385..859a5c5d51d0 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.h @@ -61,6 +61,7 @@ enum mlxsw_sp_fib_entry_op { }; struct mlxsw_sp_fib_entry_op_ctx { + u8 bulk_ok:1; char ralue_pl[MLXSW_REG_RALUE_LEN]; };