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[73.185.129.58]) by smtp.gmail.com with ESMTPSA id o19sm1554136ilt.24.2020.11.05.10.14.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Nov 2020 10:14:29 -0800 (PST) From: Alex Elder To: davem@davemloft.net, kuba@kernel.org Cc: evgreen@chromium.org, subashab@codeaurora.org, cpratapa@codeaurora.org, bjorn.andersson@linaro.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 13/13] net: ipa: pass a value to gsi_irq_type_update() Date: Thu, 5 Nov 2020 12:14:07 -0600 Message-Id: <20201105181407.8006-14-elder@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201105181407.8006-1-elder@linaro.org> References: <20201105181407.8006-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Now that all of the GSI interrupts are handled uniformly, change gsi_irq_type_update() so it takes a value. Have the function assign that value to the cached mask of enabled GSI IRQ types before writing it to hardware. Note that gsi_irq_teardown() will only be called after gsi_irq_disable(), so it's not necessary for the former to disable all IRQ types. Get rid of that. Signed-off-by: Alex Elder --- drivers/net/ipa/gsi.c | 31 +++++++++++++------------------ 1 file changed, 13 insertions(+), 18 deletions(-) -- 2.20.1 diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index aa3983649bc30..961a11d4fb270 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -231,30 +231,29 @@ static u32 gsi_channel_id(struct gsi_channel *channel) } /* Update the GSI IRQ type register with the cached value */ -static void gsi_irq_type_update(struct gsi *gsi) +static void gsi_irq_type_update(struct gsi *gsi, u32 val) { - iowrite32(gsi->type_enabled_bitmap, - gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET); + gsi->type_enabled_bitmap = val; + iowrite32(val, gsi->virt + GSI_CNTXT_TYPE_IRQ_MSK_OFFSET); } static void gsi_irq_type_enable(struct gsi *gsi, enum gsi_irq_type_id type_id) { - gsi->type_enabled_bitmap |= BIT(type_id); - gsi_irq_type_update(gsi); + gsi_irq_type_update(gsi, gsi->type_enabled_bitmap | BIT(type_id)); } static void gsi_irq_type_disable(struct gsi *gsi, enum gsi_irq_type_id type_id) { - gsi->type_enabled_bitmap &= ~BIT(type_id); - gsi_irq_type_update(gsi); + gsi_irq_type_update(gsi, gsi->type_enabled_bitmap & ~BIT(type_id)); } /* Turn off all GSI interrupts initially */ static void gsi_irq_setup(struct gsi *gsi) { - gsi->type_enabled_bitmap = 0; - gsi_irq_type_update(gsi); + /* Disable all interrupt types */ + gsi_irq_type_update(gsi, 0); + /* Clear all type-specific interrupt masks */ iowrite32(0, gsi->virt + GSI_CNTXT_SRC_CH_IRQ_MSK_OFFSET); iowrite32(0, gsi->virt + GSI_CNTXT_SRC_EV_CH_IRQ_MSK_OFFSET); iowrite32(0, gsi->virt + GSI_CNTXT_GLOB_IRQ_EN_OFFSET); @@ -267,8 +266,7 @@ static void gsi_irq_setup(struct gsi *gsi) /* Turn off all GSI interrupts when we're all done */ static void gsi_irq_teardown(struct gsi *gsi) { - gsi->type_enabled_bitmap = 0; - gsi_irq_type_update(gsi); + /* Nothing to do */ } static void gsi_irq_ieob_enable(struct gsi *gsi, u32 evt_ring_id) @@ -308,7 +306,7 @@ static void gsi_irq_enable(struct gsi *gsi) * that so we can at least report the error should it occur. */ iowrite32(ERROR_INT_FMASK, gsi->virt + GSI_CNTXT_GLOB_IRQ_EN_OFFSET); - gsi->type_enabled_bitmap |= BIT(GSI_GLOB_EE); + gsi_irq_type_update(gsi, gsi->type_enabled_bitmap | BIT(GSI_GLOB_EE)); /* General GSI interrupts are reported to all EEs; if they occur * they are unrecoverable (without reset). A breakpoint interrupt @@ -319,18 +317,15 @@ static void gsi_irq_enable(struct gsi *gsi) val |= CMD_FIFO_OVRFLOW_FMASK; val |= MCS_STACK_OVRFLOW_FMASK; iowrite32(val, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET); - gsi->type_enabled_bitmap |= BIT(GSI_GENERAL); - - /* Finally update the interrupt types we want enabled */ - gsi_irq_type_update(gsi); + gsi_irq_type_update(gsi, gsi->type_enabled_bitmap | BIT(GSI_GENERAL)); } /* Disable all GSI interrupt types */ static void gsi_irq_disable(struct gsi *gsi) { - gsi->type_enabled_bitmap = 0; - gsi_irq_type_update(gsi); + gsi_irq_type_update(gsi, 0); + /* Clear the type-specific interrupt masks set by gsi_irq_enable() */ iowrite32(0, gsi->virt + GSI_CNTXT_GSI_IRQ_EN_OFFSET); iowrite32(0, gsi->virt + GSI_CNTXT_GLOB_IRQ_EN_OFFSET); }