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pengutronix.de; dmarc=none action=none header.from=nxp.com; Received: from DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) by DBAPR04MB7333.eurprd04.prod.outlook.com (2603:10a6:10:1b2::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3455.21; Tue, 20 Oct 2020 07:54:21 +0000 Received: from DB8PR04MB6795.eurprd04.prod.outlook.com ([fe80::3c3a:58b9:a1cc:cbcc]) by DB8PR04MB6795.eurprd04.prod.outlook.com ([fe80::3c3a:58b9:a1cc:cbcc%9]) with mapi id 15.20.3477.028; Tue, 20 Oct 2020 07:54:21 +0000 From: Joakim Zhang To: mkl@pengutronix.de, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, linux-imx@nxp.com, victor.liu@nxp.com, linux-can@vger.kernel.org, pankaj.bansal@nxp.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V3 04/10] can: flexcan: add ECC initialization for LX2160A Date: Tue, 20 Oct 2020 23:53:56 +0800 Message-Id: <20201020155402.30318-5-qiangqing.zhang@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201020155402.30318-1-qiangqing.zhang@nxp.com> References: <20201020155402.30318-1-qiangqing.zhang@nxp.com> X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: SGBP274CA0015.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b0::27) To DB8PR04MB6795.eurprd04.prod.outlook.com (2603:10a6:10:fa::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.71) by SGBP274CA0015.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b0::27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3477.21 via Frontend Transport; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: rkxOfJte5fvK8KDZSSdjsVGAzMg8fSFqUwcc4WakNUI493smCEQEbZFxI19Qc4I5w1qF/ANback6Y7VQxQwpG6kKTK1LCl8GZtjmquvkU2Ygf5Nz7WvE+fqLlDEbgLJV2WWz6ljVlgyYX1nf2tnjdXmfmlqsNZbwK/GG5UwDPlUO0MVtWqTB1T0mEkO/sPZfcESDBD2IvUXNyCTJsBnVJ4/nhcyNNlrrCDkBeLcDaoK2Bxbtb5BQ5xick7nS9WgPKuhNZk1V4yN9Axg6Lj1fTpud++N3lsKOKMz1eRRbkPo4GA8JydqXi4Gf9p3EAqhgan/9m5Uoy4E1NxJLLApH/LJMAZ22e17fqgVpeRNcGYo5QknUTXXFLozbECAAbD3k8m9z0j5EDsSUTdkV+/A6cQ+J9EINB4JKqbd+DFUM9syPJ/ZgAXuAfvHGjovWPOLYJT8PAeOJoy27vJH5jdN+5NzMln2ArLQavlKLjtf1OwngTpgysfKQ8mUCMpCXsiEDlOeU9UBx/Tvg6aNJoQ+RF15F1V4wCdVXgldKDZ81HXugZ8C2eMt2h6/T9QyOt5m0ntf52daiA+LjHePmXXX1WHT0yU7rgmyDbKzFUUgkQQaCRsFpeFZkwbDLg28ys4dFkRETGWkCXc7VSNGtSYgxww== X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0c01c27b-1e03-487c-869d-08d874cd5a88 X-MS-Exchange-CrossTenant-AuthSource: DB8PR04MB6795.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Oct 2020 07:54:21.0731 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: c4k4Tb7IyULhijWpqJSJDLkRYhDD8QG9CvLeKlVjxuBoMXuXK8parjnKruBBs2AJ/SpqnTF7aoxV1ojfRgimeQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBAPR04MB7333 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org After double check with Layerscape CAN owner (Pankaj Bansal), confirm that LX2160A indeed supports ECC feature, so correct the feature table. For SoCs with ECC supported, even use FLEXCAN_QUIRK_DISABLE_MECR quirk to disable non-correctable errors interrupt and freeze mode, had better use FLEXCAN_QUIRK_SUPPORT_ECC quirk to initialize all memory. Fixes: 2c19bb43e5572 ("can: flexcan: add lx2160ar1 support") Cc: Pankaj Bansal Signed-off-by: Joakim Zhang --- drivers/net/can/flexcan.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index 586e1417a697..c2330eab3595 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -217,7 +217,7 @@ * MX8MP FlexCAN3 03.00.17.01 yes yes no yes yes yes * VF610 FlexCAN3 ? no yes no yes yes? no * LS1021A FlexCAN2 03.00.04.00 no yes no no yes no - * LX2160A FlexCAN3 03.00.23.00 no yes no no yes yes + * LX2160A FlexCAN3 03.00.23.00 no yes no yes yes yes * * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. */ @@ -411,7 +411,8 @@ static const struct flexcan_devtype_data fsl_ls1021a_r2_devtype_data = { static const struct flexcan_devtype_data fsl_lx2160a_r1_devtype_data = { .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE | - FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | FLEXCAN_QUIRK_SUPPORT_FD, + FLEXCAN_QUIRK_USE_OFF_TIMESTAMP | FLEXCAN_QUIRK_SUPPORT_FD | + FLEXCAN_QUIRK_SUPPORT_ECC, }; static const struct can_bittiming_const flexcan_bittiming_const = {