From patchwork Fri Oct 14 13:40:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 77661 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp300062qge; Fri, 14 Oct 2016 06:41:00 -0700 (PDT) X-Received: by 10.99.116.91 with SMTP id e27mr15327382pgn.154.1476452460093; Fri, 14 Oct 2016 06:41:00 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m63si15175929pgm.88.2016.10.14.06.40.59; Fri, 14 Oct 2016 06:41:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756255AbcJNNkr (ORCPT + 4 others); Fri, 14 Oct 2016 09:40:47 -0400 Received: from mail-lf0-f45.google.com ([209.85.215.45]:36051 "EHLO mail-lf0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755342AbcJNNko (ORCPT ); Fri, 14 Oct 2016 09:40:44 -0400 Received: by mail-lf0-f45.google.com with SMTP id b75so196135619lfg.3 for ; Fri, 14 Oct 2016 06:40:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=L03H7BfQ4phTJv+w+/mEpNPk/94t2ZQsW+OHFwDvpAo=; b=JCCcb2/950q7HET22r38G6dbo+lS6DNFJzgQg+tlAzt2JqWk+HpEdlJkRz48lNuLMZ ujXVjVLK2o1LWVKeLEBqF5+p4y+JdL+HhHvYzMocl0v5bb9QnafC48nvhCZ1POlpeYcQ jCOPDVwGrbBhTUdK0ljWDHhyCtsIqW8v2sYXM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=L03H7BfQ4phTJv+w+/mEpNPk/94t2ZQsW+OHFwDvpAo=; b=KrouwdGF4tXlFrLWrBiaPRszXSKVYuS2dl3sQda3xPhaaQtoXprARH4rd+XBxkMdvt EaEIQ6WREKF0q/C2HPanhaIQfpT7GZH2jeDgST8CBdYcUPwFLxYxEDpqBU5iv4kWwzaO aNsYp9zat6bDMi9zG+Qg/d/tT7GQn+QCD5YQP6+b5Uo+rY9DVeSqP1T6l3OcnyvwV97F YE/QNzIfyAhdw5zf6r8V0iH1XeILuj2eKL9GOaWt85P2Q86lDe9mTGnwy/cCJSH/bTR+ tholCNThgbd6r41gtLDkMjIZK0h8Rl9XqK80+rmPq5NnMuGrIQnk/4Xh8WG7VjMT3Bxs p6jw== X-Gm-Message-State: AA6/9RlVhcDWvSY+P/qCU2DdU7OIHZoFdLrhcfnHWrnjPemcNQSpRPGo5WswaGVZIEyTnkUn X-Received: by 10.28.17.212 with SMTP id 203mr2697801wmr.48.1476452441680; Fri, 14 Oct 2016 06:40:41 -0700 (PDT) Received: from localhost.localdomain ([105.149.88.69]) by smtp.gmail.com with ESMTPSA id kg7sm31955149wjb.34.2016.10.14.06.40.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 14 Oct 2016 06:40:40 -0700 (PDT) From: Ard Biesheuvel To: romieu@fr.zoreil.com, nic_swsd@realtek.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, davem@davemloft.net Cc: Ard Biesheuvel Subject: [PATCH v2] r8169: set coherent DMA mask as well as streaming DMA mask Date: Fri, 14 Oct 2016 14:40:33 +0100 Message-Id: <1476452433-20518-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org PCI devices that are 64-bit DMA capable should set the coherent DMA mask as well as the streaming DMA mask. On some architectures, these are managed separately, and so the coherent DMA mask will be left at its default value of 32 if it is not set explicitly. This results in errors such as r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded hwdev DMA mask = 0x00000000ffffffff, dev_addr = 0x00000080fbfff000 swiotlb: coherent allocation failed for device 0000:02:00.0 size=4096 CPU: 0 PID: 1062 Comm: systemd-udevd Not tainted 4.8.0+ #35 Hardware name: AMD Seattle/Seattle, BIOS 10:53:24 Oct 13 2016 on systems without memory that is 32-bit addressable by PCI devices. Signed-off-by: Ard Biesheuvel --- v2: dropped the hunk that sets the coherent DMA mask to DMA_BIT_MASK(32), which is unnecessary given that it is the default drivers/net/ethernet/realtek/r8169.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index e55638c7505a..bf000d819a21 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -8273,7 +8273,8 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if ((sizeof(dma_addr_t) > 4) && (use_dac == 1 || (use_dac == -1 && pci_is_pcie(pdev) && tp->mac_version >= RTL_GIGA_MAC_VER_18)) && - !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { + !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && + !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) { /* CPlusCmd Dual Access Cycle is only needed for non-PCIe */ if (!pci_is_pcie(pdev))