From patchwork Tue Jul 26 02:56:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Brooks X-Patchwork-Id: 72763 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp1456593qga; Mon, 25 Jul 2016 20:03:13 -0700 (PDT) X-Received: by 10.55.144.6 with SMTP id s6mr25288332qkd.6.1469502193653; Mon, 25 Jul 2016 20:03:13 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id c24si19700179qkj.320.2016.07.25.20.03.13; Mon, 25 Jul 2016 20:03:13 -0700 (PDT) Received-SPF: pass (google.com: domain of lng-odp-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of lng-odp-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=lng-odp-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 3759D61643; Tue, 26 Jul 2016 03:03:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id A3297686D6; Tue, 26 Jul 2016 02:58:14 +0000 (UTC) X-Original-To: lng-odp@lists.linaro.org Delivered-To: lng-odp@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id EEF9468517; Tue, 26 Jul 2016 02:58:06 +0000 (UTC) Received: from mail-io0-f178.google.com (mail-io0-f178.google.com [209.85.223.178]) by lists.linaro.org (Postfix) with ESMTPS id 86335686E0 for ; Tue, 26 Jul 2016 02:56:46 +0000 (UTC) Received: by mail-io0-f178.google.com with SMTP id 38so190535227iol.0 for ; Mon, 25 Jul 2016 19:56:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GL36EpQ/gVxCJY2onWV/S8tA8f3kbixE8n9SwBInrSk=; b=m9JlQzDWH7nYRoYmPo98/IWVTsGoPPgCliAKPGHZYmmKIrwmjhna/YDBdsRtTJXTzH +Jy7aQ0n7EjZOSYffvjmCvgCEERHR6sRYj2w95abcVybwCQyUDIKZznBgrUdzWyijbg/ Zv4Ufz7xvjP8rknILSv5glIrAzNGBETYNmnCdvslKbsPtBcE9GxDVCezcLO4geszkdr8 fQzY1J7WrOtzUyjVlOMC/3xnyemJ2bSDEtZrMvjRnh1u+blntMmFzoZ9TLNhL8d+4gCO Kc35BDZMvZqYBVGLek9O/2fC1vzRkt/dJBkms+OYPgUWb6BHHGnOj43cfHBeQWI1RWOP TdPg== X-Gm-Message-State: AEkooutPJXuS/RlILFiTWOOwfafYTZ2EhwqDD/zpD95Ol/mpOrhcOSDfbOIcTXAOaaodiv4gJSU= X-Received: by 10.157.31.35 with SMTP id x32mr12354988otd.15.1469501806134; Mon, 25 Jul 2016 19:56:46 -0700 (PDT) Received: from localhost.localdomain (68-248-140-212.lightspeed.austtx.sbcglobal.net. [68.248.140.212]) by smtp.gmail.com with ESMTPSA id z189sm12624679oig.29.2016.07.25.19.56.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 Jul 2016 19:56:45 -0700 (PDT) From: Brian Brooks To: lng-odp@lists.linaro.org Date: Mon, 25 Jul 2016 21:56:25 -0500 Message-Id: <20160726025625.7343-13-brian.brooks@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160726025625.7343-1-brian.brooks@linaro.org> References: <20160726025625.7343-1-brian.brooks@linaro.org> X-Topics: patch Subject: [lng-odp] [PATCH v3 12/12] arm: odp_cpu_cycles for arm X-BeenThere: lng-odp@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "The OpenDataPlane \(ODP\) List" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: lng-odp-bounces@lists.linaro.org Sender: "lng-odp" Signed-off-by: Brian Brooks --- platform/linux-generic/arch/arm/cpu_arch.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.9.0 diff --git a/platform/linux-generic/arch/arm/cpu_arch.h b/platform/linux-generic/arch/arm/cpu_arch.h index 19ee349..3881c2f 100644 --- a/platform/linux-generic/arch/arm/cpu_arch.h +++ b/platform/linux-generic/arch/arm/cpu_arch.h @@ -18,10 +18,26 @@ extern "C" { static inline uint64_t _odp_cpu_cycles(void) { #if defined(__aarch64__) + /* Read architected timer which runs at a fixed frequency independent + * of the CPU frequency. + */ uint64_t vct; __asm__ volatile("isb" : : : "memory"); __asm__ volatile("mrs %0, cntvct_el0" : "=r" (vct)); return vct; +#elif defined(__ARM_ARCH_7A__) + /* Try to read cycle count from PMU. */ + uint32_t useren, cnten, cnt; + __asm__ volatile("mrc p15, 0, %0, c9, c14, 0" : "=r"(useren)); + if (useren & 0x1) { + __asm__ volatile("mrc p15, 0, %0, c9, c12, 1" : "=r"(cnten)); + if (cnten & 0x80000000ul) { + __asm__ volatile( + "mrc p15, 0, %0, c9, c13, 0" : "=r"(cnt)); + return ((uint64_t) cnt) << 6; + } + } + return 0; #endif }