From patchwork Tue Jul 26 02:56:23 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Brooks X-Patchwork-Id: 72762 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp1456552qga; Mon, 25 Jul 2016 20:03:07 -0700 (PDT) X-Received: by 10.55.221.25 with SMTP id n25mr25011097qki.110.1469502187504; Mon, 25 Jul 2016 20:03:07 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id 7si19690533qtz.144.2016.07.25.20.03.06; Mon, 25 Jul 2016 20:03:07 -0700 (PDT) Received-SPF: pass (google.com: domain of lng-odp-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of lng-odp-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=lng-odp-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 1B3F063012; Tue, 26 Jul 2016 03:02:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 5E624617BF; Tue, 26 Jul 2016 02:58:12 +0000 (UTC) X-Original-To: lng-odp@lists.linaro.org Delivered-To: lng-odp@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id D474A68090; Tue, 26 Jul 2016 02:58:06 +0000 (UTC) Received: from mail-io0-f179.google.com (mail-io0-f179.google.com [209.85.223.179]) by lists.linaro.org (Postfix) with ESMTPS id 56500686D7 for ; Tue, 26 Jul 2016 02:56:43 +0000 (UTC) Received: by mail-io0-f179.google.com with SMTP id 38so190533305iol.0 for ; Mon, 25 Jul 2016 19:56:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Um+VIh7ViZl2UbVeGLaKk7GVTITzBKd+smLHw4dN/r0=; b=jXkkqlMp9x2LOYn09IhoBMZiTZfrVR/TygUT1YHLbLmYsgtYllBW8oZx3vD+8Wjk2K 3N4Hn+rb5P05Qk0GqHiUmBQvqnC4DyKBorqGYSKunm45jLSPKuuffU3b86eDADVOYmvg tkF3c+SYblBZab9EDa7uPaDT7JckHBI9ehQcDbTiMqxdW2fo1Yw6VeUVc9hrbJBLJDBB X3lpah7IEW5Gxh8gm9mXm1wrSExvv89+bokEZKUEKP7cPzKkEV4HrxM2eUX6inImaBzn nZebedD2SuV0EFB+LRDZojqxW5NJg35imYY/FBtPI1MtRxURLtRLgwVXAjT8dFOE1u6O RN/A== X-Gm-Message-State: AEkoouuDmz6wPICdRFkoIXAtY3UF1uqm1KNTpT4GlMSUV++txGhoijIH68ziC8r9aPMarR9hk1M= X-Received: by 10.202.107.2 with SMTP id g2mr9839415oic.1.1469501802926; Mon, 25 Jul 2016 19:56:42 -0700 (PDT) Received: from localhost.localdomain (68-248-140-212.lightspeed.austtx.sbcglobal.net. [68.248.140.212]) by smtp.gmail.com with ESMTPSA id z189sm12624679oig.29.2016.07.25.19.56.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 Jul 2016 19:56:42 -0700 (PDT) From: Brian Brooks To: lng-odp@lists.linaro.org Date: Mon, 25 Jul 2016 21:56:23 -0500 Message-Id: <20160726025625.7343-11-brian.brooks@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160726025625.7343-1-brian.brooks@linaro.org> References: <20160726025625.7343-1-brian.brooks@linaro.org> X-Topics: patch Subject: [lng-odp] [PATCH v3 10/12] x86: odp_cpu_cycles for x86_64 X-BeenThere: lng-odp@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "The OpenDataPlane \(ODP\) List" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: lng-odp-bounces@lists.linaro.org Sender: "lng-odp" Signed-off-by: Brian Brooks --- platform/linux-generic/arch/x86/odp_cpu_arch.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) -- 2.9.0 diff --git a/platform/linux-generic/arch/x86/odp_cpu_arch.c b/platform/linux-generic/arch/x86/odp_cpu_arch.c index c3be356..a9e819d 100644 --- a/platform/linux-generic/arch/x86/odp_cpu_arch.c +++ b/platform/linux-generic/arch/x86/odp_cpu_arch.c @@ -7,17 +7,10 @@ uint64_t odp_cpu_cycles(void) { - union { - uint64_t tsc_64; - struct { - uint32_t lo_32; - uint32_t hi_32; - }; - } tsc; - - __asm__ __volatile__ ("rdtsc" : - "=a" (tsc.lo_32), - "=d" (tsc.hi_32) : : "memory"); - - return tsc.tsc_64; +#if defined(__x86_64__) || defined(__amd64__) + uint64_t hi, lo; + __asm__ volatile("mfence" : : : "memory"); + __asm__ volatile("rdtsc" : "=a" (lo), "=d" (hi)); + return (hi << 32) | lo; +#endif }