From patchwork Wed Nov 11 02:40:56 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 56366 Delivered-To: patch@linaro.org Received: by 10.112.155.196 with SMTP id vy4csp1116557lbb; Tue, 10 Nov 2015 18:41:40 -0800 (PST) X-Received: by 10.66.168.171 with SMTP id zx11mr10627678pab.125.1447209700500; Tue, 10 Nov 2015 18:41:40 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ax2si9144968pbc.170.2015.11.10.18.41.40; Tue, 10 Nov 2015 18:41:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=neutral (body hash did not verify) header.i=@linaro_org.20150623.gappssmtp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752358AbbKKClZ (ORCPT + 28 others); Tue, 10 Nov 2015 21:41:25 -0500 Received: from mail-pa0-f48.google.com ([209.85.220.48]:36300 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752282AbbKKClW (ORCPT ); Tue, 10 Nov 2015 21:41:22 -0500 Received: by pacdm15 with SMTP id dm15so16314041pac.3 for ; Tue, 10 Nov 2015 18:41:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro_org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=aHSVctfK5jwBhcEDgpgmvT5LsJZjv2TS0lhFtxTTEzU=; b=wiTrWNr179E53BXbnQl5YCxaDblqVwZXqN8oJLJiPRQjY9eGtbNG40N+d8CiNO3fYS W4R/ZnESHCcRTHzak8GROimzDMU3/TgfBO9N3Q3VfXuIuNn+GWi0un0HlIIcQs7Y7u3z kOA+tuCGZMCvdYTtOd8MENwMpXxuCxEPuTgFn2vBhbD63I9Tbpd+o9QwHdANRDIAnEyt J4ASNUf7lbDjmexan2MTLJ7svYDsw3Z2kZVzg5mQGUqZVPwGO4CZQMVMnL4RHK43xQle FTs17fvCrd9zgMjwDFYbRLKDI+fbOUKuDhU03TdQ7igwNtWyl2YXGxZIST6Gt4xd2yu+ gCsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=aHSVctfK5jwBhcEDgpgmvT5LsJZjv2TS0lhFtxTTEzU=; b=QXWZ/WKfMmetAkBambl4gokNLErsadrJSrJ9sCND6aeWF+g/Q3F/18bAwW7I7jVLZD OeKP6XIPPR3k8c3NzZOWD94tmozzBsxnog0jdMRucCmBAfqC6jqxg1ijv5yN6mRZFECO kPBscqoDMVlWO3b8u+/5XAos/1n0cFdNekk6Q+PQZh8PZeRmFSBw3eUb+RtgQA6Twshz zvy5uanSFkt/0cnRqv/79GY2FqaB7AOaNGqXze2ImSNifOxv47C9MDCSlhVqx+dS5n15 nbvGmcBgQt49hkhWPHJISFw+WiJQjX6ltThr7mGOmvyxTCZ88b8EUZo9JVsqIWlEUg5W x1Mg== X-Gm-Message-State: ALoCoQnQOzwn+RdVRov1XV/denHOy8u9/6voaySzPk3vTv5EUJcyKKFjxP6V12MxfQHMmdgFrV8o X-Received: by 10.68.226.105 with SMTP id rr9mr10748646pbc.29.1447209681690; Tue, 10 Nov 2015 18:41:21 -0800 (PST) Received: from localhost ([122.167.29.19]) by smtp.gmail.com with ESMTPSA id cx5sm6660990pbc.50.2015.11.10.18.41.20 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Tue, 10 Nov 2015 18:41:21 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki , robh+dt@kernel.org, sboyd@codeaurora.org, lee.jones@linaro.org Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, mark.rutland@arm.com, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, nm@ti.com, devicetree@vger.kernel.org, b.zolnierkie@samsung.com, m.szyprowski@samsung.com, Viresh Kumar , Rob Herring , linux-kernel@vger.kernel.org (open list), "Rafael J. Wysocki" Subject: [PATCH V3 3/5] PM / OPP: Remove 'operating-points-names' binding Date: Wed, 11 Nov 2015 08:10:56 +0530 Message-Id: X-Mailer: git-send-email 2.6.2.198.g614a2ac In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org These aren't used until now by any DT files and wouldn't be used now as we have a better scheme in place now, i.e. opp-property- properties. Remove the (useless) binding without breaking ABI. Reviewed-by: Stephen Boyd Acked-by: Rob Herring Signed-off-by: Viresh Kumar --- Documentation/devicetree/bindings/opp/opp.txt | 62 +-------------------------- 1 file changed, 2 insertions(+), 60 deletions(-) -- 2.6.2.198.g614a2ac -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/Documentation/devicetree/bindings/opp/opp.txt b/Documentation/devicetree/bindings/opp/opp.txt index a3e7f0d5e1fb..24eac9a97749 100644 --- a/Documentation/devicetree/bindings/opp/opp.txt +++ b/Documentation/devicetree/bindings/opp/opp.txt @@ -45,21 +45,10 @@ Devices supporting OPPs must set their "operating-points-v2" property with phandle to a OPP table in their DT node. The OPP core will use this phandle to find the operating points for the device. -Devices may want to choose OPP tables at runtime and so can provide a list of -phandles here. But only *one* of them should be chosen at runtime. This must be -accompanied by a corresponding "operating-points-names" property, to uniquely -identify the OPP tables. - If required, this can be extended for SoC vendor specfic bindings. Such bindings should be documented as Documentation/devicetree/bindings/power/-opp.txt and should have a compatible description like: "operating-points-v2-". -Optional properties: -- operating-points-names: Names of OPP tables (required if multiple OPP - tables are present), to uniquely identify them. The same list must be present - for all the CPUs which are sharing clock/voltage rails and hence the OPP - tables. - * OPP Table Node This describes the OPPs belonging to a device. This node can have following @@ -448,54 +437,7 @@ Example 4: Handling multiple regulators }; }; -Example 5: Multiple OPP tables - -/ { - cpus { - cpu@0 { - compatible = "arm,cortex-a7"; - ... - - cpu-supply = <&cpu_supply> - operating-points-v2 = <&cpu0_opp_table_slow>, <&cpu0_opp_table_fast>; - operating-points-names = "slow", "fast"; - }; - }; - - cpu0_opp_table_slow: opp_table_slow { - compatible = "operating-points-v2"; - status = "okay"; - opp-shared; - - opp00 { - opp-hz = /bits/ 64 <600000000>; - ... - }; - - opp01 { - opp-hz = /bits/ 64 <800000000>; - ... - }; - }; - - cpu0_opp_table_fast: opp_table_fast { - compatible = "operating-points-v2"; - status = "okay"; - opp-shared; - - opp10 { - opp-hz = /bits/ 64 <1000000000>; - ... - }; - - opp11 { - opp-hz = /bits/ 64 <1100000000>; - ... - }; - }; -}; - -Example 6: opp-supported-hw +Example 5: opp-supported-hw (example: three level hierarchy of versions: cuts, substrate and process) / { @@ -540,7 +482,7 @@ Example 6: opp-supported-hw }; }; -Example 7: opp-microvolt-, opp-microamp-: +Example 6: opp-microvolt-, opp-microamp-: (example: device with two possible microvolt ranges: slow and fast) / {