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[209.132.180.67]) by mx.google.com with ESMTP id b10si13320510pgn.43.2017.08.01.02.29.34; Tue, 01 Aug 2017 02:29:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=CT2/PqMy; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751657AbdHAJ3c (ORCPT + 26 others); Tue, 1 Aug 2017 05:29:32 -0400 Received: from mail-pf0-f176.google.com ([209.85.192.176]:33962 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751924AbdHAJ3N (ORCPT ); Tue, 1 Aug 2017 05:29:13 -0400 Received: by mail-pf0-f176.google.com with SMTP id o86so2176480pfj.1 for ; Tue, 01 Aug 2017 02:29:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=shxbM+ccNBl6QL2YjiLs+xH/6Z0DkTwy+gGjIg8ilR8=; b=CT2/PqMy18Mg8dy7IDkNQNYOdgJx4ZdRypJ8BLAvBzo/7GSFO9WwG6GXdLLRmwB1Ng 576DfHp8Mqt/P26nzjl2A5Ec0P2theO3atdws6zY74cLK4IRe6kqDJThRo1eKbAZzam7 OvUcJZ/9fpiGtZ5XPU7nCHPMGEI/yV8jWmTac= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=shxbM+ccNBl6QL2YjiLs+xH/6Z0DkTwy+gGjIg8ilR8=; b=U+9xxZCqM1aKHB81wUEHyuQO5NM/IIO/0wgvtnY35eyzptRdNGthugaz6PcYU+WbsY qCdR0lI1bpsMKsqJ85cw+6+vFX+JK73qBmj6wYf5hm4lNE2NmP7feOwVq/WoazC703eR Ldr2nPHXcyVMitHZyQehDwXO6pzr0CoO7LG3V9QHKEqxJRVg6ner6WnlKqhmJEozubpj ty3mTp40xmlBZ9uB5eXX1daE07LdS64DUJK7/BnPQxyDxAOogejRjwh1ExecpbfzzDBs rag/ruLFa5IiULEez6aJuXV3iqluWEfZLVxEHUn5mfUTAjWkR0SOfNHJocVuKIql6N5q k9yg== X-Gm-Message-State: AIVw111BNTQNiOCTIARMT8xF5SHvTNkC0dhdbKG+qVUHDxhpBAeNU6wJ Y3z+ohbOdf6f2rbJQBEQ/g== X-Received: by 10.99.120.193 with SMTP id t184mr18277435pgc.35.1501579753130; Tue, 01 Aug 2017 02:29:13 -0700 (PDT) Received: from localhost ([122.172.27.66]) by smtp.gmail.com with ESMTPSA id j29sm64985874pfj.68.2017.08.01.02.29.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 01 Aug 2017 02:29:12 -0700 (PDT) From: Viresh Kumar To: Greg Kroah-Hartman Cc: Viresh Kumar , Vincent Guittot , Mark Brown , Stephen Boyd , Rajendra Nayak , Shiraz Hashim , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, robdclark@gmail.com Subject: [PATCH V3 8/8] drivers: boot_constraint: Add Qualcomm display controller constraints Date: Tue, 1 Aug 2017 14:53:49 +0530 Message-Id: X-Mailer: git-send-email 2.13.0.71.gd7076ec9c9cb In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rajendra Nayak NOT TO BE MERGED This sets boot constraints for the display controller used on Qualcomm dragonboard 410c. Not-signed-off-by: Rajendra Nayak Not-signed-off-by: Viresh Kumar --- drivers/base/boot_constraints/Makefile | 2 +- drivers/base/boot_constraints/qcom-display.c | 107 +++++++++++++++++++++++++++ 2 files changed, 108 insertions(+), 1 deletion(-) create mode 100644 drivers/base/boot_constraints/qcom-display.c -- 2.13.0.71.gd7076ec9c9cb diff --git a/drivers/base/boot_constraints/Makefile b/drivers/base/boot_constraints/Makefile index a765094623a3..b0bdf67ebbbf 100644 --- a/drivers/base/boot_constraints/Makefile +++ b/drivers/base/boot_constraints/Makefile @@ -1,3 +1,3 @@ # Makefile for device boot constraints -obj-y := clk.o deferrable_dev.o core.o pm.o supply.o +obj-y := clk.o deferrable_dev.o core.o pm.o supply.o qcom-display.o diff --git a/drivers/base/boot_constraints/qcom-display.c b/drivers/base/boot_constraints/qcom-display.c new file mode 100644 index 000000000000..29f930ac692b --- /dev/null +++ b/drivers/base/boot_constraints/qcom-display.c @@ -0,0 +1,107 @@ +/* + * Sets up constraints on behalf of the bootloader, which uses display + * controller to display a flash screen during system boot. + */ + +#include +#include +#include + +struct dev_boot_constraint_clk_info iface_clk_info = { + .name = "iface_clk", +}; + +struct dev_boot_constraint_clk_info bus_clk_info = { + .name = "bus_clk", +}; + +struct dev_boot_constraint_clk_info core_clk_info = { + .name = "core_clk", +}; + +struct dev_boot_constraint_clk_info vsync_clk_info = { + .name = "vsync_clk", +}; + +struct dev_boot_constraint_clk_info esc0_clk_info = { + .name = "core_clk", +}; + +struct dev_boot_constraint_clk_info byte_clk_info = { + .name = "byte_clk", +}; + +struct dev_boot_constraint_clk_info pixel_clk_info = { + .name = "pixel_clk", +}; + +struct dev_boot_constraint_supply_info vdda_info = { + .name = "vdda" +}; + +struct dev_boot_constraint_supply_info vddio_info = { + .name = "vddio" +}; + +struct dev_boot_constraint constraints_mdss[] = { + { + .type = DEV_BOOT_CONSTRAINT_PM, + .data = NULL, + }, +}; + +struct dev_boot_constraint constraints_mdp[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &iface_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &bus_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &core_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &vsync_clk_info, + }, +}; + +struct dev_boot_constraint constraints_dsi[] = { + { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &esc0_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &byte_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_CLK, + .data = &pixel_clk_info, + }, { + .type = DEV_BOOT_CONSTRAINT_SUPPLY, + .data = &vdda_info, + + }, { + .type = DEV_BOOT_CONSTRAINT_SUPPLY, + .data = &vddio_info, + }, +}; + +static int __init qcom_constraints_init(void) +{ + int ret; + + ret = dev_boot_constraint_add_of_deferrable("qcom,mdss", + constraints_mdss, ARRAY_SIZE(constraints_mdss)); + if (ret) + return ret; + + ret = dev_boot_constraint_add_of_deferrable("qcom,mdp5", + constraints_mdp, ARRAY_SIZE(constraints_mdp)); + if (ret) + return ret; + + ret = dev_boot_constraint_add_of_deferrable("qcom,mdss-dsi-ctrl", + constraints_dsi, ARRAY_SIZE(constraints_dsi)); + return ret; +} +subsys_initcall(qcom_constraints_init);