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[209.132.180.67]) by mx.google.com with ESMTP id h189-v6si13072748pge.66.2018.07.09.04.28.34; Mon, 09 Jul 2018 04:28:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="A/g0mtb0"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932928AbeGIL2d (ORCPT + 31 others); Mon, 9 Jul 2018 07:28:33 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:35069 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932862AbeGIL23 (ORCPT ); Mon, 9 Jul 2018 07:28:29 -0400 Received: by mail-wr1-f66.google.com with SMTP id a3-v6so1360906wrt.2 for ; Mon, 09 Jul 2018 04:28:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=LboO0m9tdUv5OClL5JGmFqiWh7zVC6d1MgWg2XNw1k8=; b=A/g0mtb0jokK/Zde6XuLfjxTTtg6h3hQJZF9JIcvbRbwAzfhJtYj+sep0ubtKo4GQ7 7aUUny3kxn21N3RXBmnegF8lGiPq/5p13zCpKzNMu5lP8O+HQVWixGmos+Adpu10EdqX nbc1R2O4KhpdeFNYWqnrKUmBwJgp+yrfDK39w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=LboO0m9tdUv5OClL5JGmFqiWh7zVC6d1MgWg2XNw1k8=; b=CwQGJqnbqwfoUrBHwFxTB/GQcVAd7VILIke74MwbDxNBfTcaCePFxm9ndNGKPz8xKY KU1EZ1OZrC5Ib2sgySbvqpvsCTyFBQhXCmx2gStJmDH3lrn8+nQ8foFLQv0LBdAKP6JZ NJb5h1Y2HNt/K4eO8tr+T/e3LTG+wmuNWtf2OfyPDEg5RW9tbzpevLlYDj280Lgg6+/5 MpDaBvGO0TNDchHTpBMrqqM1vH7Dxz76bCPYj0KcmucN606EJtchATkIOwwKofcRJ+zR HeEtzRRfJACwzR8AhtMu+k4Xwpb8E4lvt3J6Rr+yoQil9IAEtyBdqw/SaqUxhx1K8hts QRAA== X-Gm-Message-State: APt69E1lKnTXA1o9GngewcmxTFGYyJeMBTUsNgwBnmtV5EPu61Pj1k/B wTqV7Gq3XrWk12NHO7zjfKOGZEqUNW8= X-Received: by 2002:a5d:4c4c:: with SMTP id n12-v6mr13824589wrt.71.1531135708058; Mon, 09 Jul 2018 04:28:28 -0700 (PDT) Received: from localhost ([49.248.189.240]) by smtp.gmail.com with ESMTPSA id h5-v6sm1095318wrr.19.2018.07.09.04.28.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 09 Jul 2018 04:28:27 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, vivek.gautam@codeaurora.org, andy.gross@linaro.org, David Brown , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 3/7] dt: qcom: 8996: thermal: Move to DT initialisation Date: Mon, 9 Jul 2018 16:57:36 +0530 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We also split up the regmap address space into two, one for the TM registers, the other for the SROT registers. This was required to deal with different address offsets for the TM and SROT registers across different SoC families. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT). This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 8c7f9ca..6c8a857 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -461,7 +461,17 @@ tsens0: thermal-sensor@4a8000 { compatible = "qcom,msm8996-tsens"; - reg = <0x4a8000 0x2000>; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ + #qcom,sensors = <13>; + #thermal-sensor-cells = <1>; + }; + + tsens1: thermal-sensor@4ac000 { + compatible = "qcom,msm8996-tsens"; + reg = <0x4ad000 0x1000>, /* TM */ + <0x4ac000 0x1000>; /* SROT */ + #qcom,sensors = <8>; #thermal-sensor-cells = <1>; };