From patchwork Thu Jan 28 08:20:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 60684 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp332494lbb; Thu, 28 Jan 2016 00:24:10 -0800 (PST) X-Received: by 10.98.69.209 with SMTP id n78mr2609930pfi.81.1453969450448; Thu, 28 Jan 2016 00:24:10 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o77si57884pfi.119.2016.01.28.00.24.10; Thu, 28 Jan 2016 00:24:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966143AbcA1IYI (ORCPT + 30 others); Thu, 28 Jan 2016 03:24:08 -0500 Received: from mail-pf0-f182.google.com ([209.85.192.182]:33943 "EHLO mail-pf0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965455AbcA1IV2 (ORCPT ); Thu, 28 Jan 2016 03:21:28 -0500 Received: by mail-pf0-f182.google.com with SMTP id o185so15202416pfb.1 for ; Thu, 28 Jan 2016 00:21:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=2vibggD8ffkFnibJRjs49bJHemuWisj+oJBDsXeJwKA=; b=ednQpPD5mX79Ho75hbylXm37NuZsdhhsA5Y38aFV7+QaJ6gJwgtH/Smox6tlYMFq5u AXGY08JuW+38Y2OZBFOEJa4+3TlLXTIXKDucZqfZk9uYy2cNQ9lCYQ3InRzQ4NOmuJgR 0j8YPPfSecfjXQrbSatBg2+oHShuOd/75RmuE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=2vibggD8ffkFnibJRjs49bJHemuWisj+oJBDsXeJwKA=; b=MEjAIcaq8l6dxAyE8+tM3jjCykG5OmAaAuWdEy8tjtg4LxzY2huREWSvCWa/b7Gmia 3GzghreMVJ5HWBZ5u5OJQCuSVV7k4JsFrAV8vFqQJh2zP52QKnoW/ponJZP+aZqaEzNq BuRox1xHVgSgr9xkQB6yOl6BpGCXZGt7Cz8nA+xipw6CGZtOKJvZ9VgsOGBdjj3M/PCz V7srIPop862mqkGlSJWx1r/FSRO7/Ss+c9SizwKJZ5PSCbVIwEYmnTNiSjALz1R+PGYw CXQSMKB2nlWY+xN8RFoj8Pw3NQrFaHQM8rTlOLOvn/6XpzZBl7F/d4ufW1n0HS78ogA9 EsjQ== X-Gm-Message-State: AG10YOQ90nCHUKtsVw6IdD1gMfIjep07Q0jbcWPrARcsKmEcrHwHHx3sfe4ib3jgHvLXV8gk X-Received: by 10.98.93.24 with SMTP id r24mr2633599pfb.23.1453969287614; Thu, 28 Jan 2016 00:21:27 -0800 (PST) Received: from localhost ([122.171.121.234]) by smtp.gmail.com with ESMTPSA id xz6sm14082106pab.42.2016.01.28.00.21.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Jan 2016 00:21:27 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, Stephen Boyd , nm@ti.com, Viresh Kumar , linux-kernel@vger.kernel.org (open list) Subject: [PATCH V2 11/16] cpufreq: dt: Pass regulator name to the OPP core Date: Thu, 28 Jan 2016 13:50:40 +0530 Message-Id: X-Mailer: git-send-email 2.7.0.79.gdc08a19 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org OPP core can handle the regulators by itself, and but it needs to know the name of the regulator to fetch. Add support for that. Signed-off-by: Viresh Kumar --- drivers/cpufreq/cpufreq-dt.c | 70 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) -- 2.7.0.79.gdc08a19 diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c index 4c9f8a828f6f..15637734986a 100644 --- a/drivers/cpufreq/cpufreq-dt.c +++ b/drivers/cpufreq/cpufreq-dt.c @@ -34,6 +34,7 @@ struct private_data { struct regulator *cpu_reg; struct thermal_cooling_device *cdev; unsigned int voltage_tolerance; /* in percentage */ + const char *reg_name; }; static struct freq_attr *cpufreq_dt_attr[] = { @@ -119,6 +120,49 @@ static int set_target(struct cpufreq_policy *policy, unsigned int index) return ret; } +/* + * An earlier version of opp-v1 bindings used to name the regulator + * "cpu0-supply", we still need to handle that for backwards compatibility. + */ +static const char *find_supply_name(struct device *dev) +{ + struct regulator *cpu_reg; + char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg; + int cpu = dev->id, ret; + + /* Try "cpu0" for older DTs */ + if (!cpu) + reg = reg_cpu0; + else + reg = reg_cpu; + +try_again: + cpu_reg = regulator_get_optional(dev, reg); + ret = PTR_ERR_OR_ZERO(cpu_reg); + if (!ret) { + regulator_put(cpu_reg); + return reg; + } + + /* + * If cpu's regulator supply node is present, but regulator is not yet + * registered, we should try defering probe. + */ + if (ret == -EPROBE_DEFER) { + dev_dbg(dev, "cpu%d regulator not ready, retry\n", cpu); + return ERR_PTR(ret); + } + + /* Try with "cpu-supply" */ + if (reg == reg_cpu0) { + reg = reg_cpu; + goto try_again; + } + + dev_dbg(dev, "no regulator for cpu%d: %d\n", cpu, ret); + return NULL; +} + static int allocate_resources(int cpu, struct device **cdev, struct regulator **creg, struct clk **cclk) { @@ -200,6 +244,7 @@ static int cpufreq_init(struct cpufreq_policy *policy) unsigned long min_uV = ~0, max_uV = 0; unsigned int transition_latency; bool opp_v1 = false; + const char *name = NULL; int ret; ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk); @@ -229,6 +274,25 @@ static int cpufreq_init(struct cpufreq_policy *policy) } /* + * OPP layer will be taking care of regulators now, but it needs to know + * the name of the regulator first. + */ + name = find_supply_name(cpu_dev); + if (IS_ERR(name)) { + ret = PTR_ERR(name); + goto out_node_put; + } + + if (name) { + ret = dev_pm_opp_set_regulator(cpu_dev, name); + if (ret) { + dev_err(cpu_dev, "Failed to set regulator for cpu%d: %d\n", + policy->cpu, ret); + goto out_node_put; + } + } + + /* * Initialize OPP tables for all policy->cpus. They will be shared by * all CPUs which have marked their CPUs shared with OPP bindings. * @@ -273,6 +337,7 @@ static int cpufreq_init(struct cpufreq_policy *policy) goto out_free_opp; } + priv->reg_name = name; of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance); transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev); @@ -366,6 +431,8 @@ static int cpufreq_init(struct cpufreq_policy *policy) kfree(priv); out_free_opp: dev_pm_opp_of_cpumask_remove_table(policy->cpus); + if (name) + dev_pm_opp_put_regulator(cpu_dev); out_node_put: of_node_put(np); out_put_reg_clk: @@ -383,6 +450,9 @@ static int cpufreq_exit(struct cpufreq_policy *policy) cpufreq_cooling_unregister(priv->cdev); dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table); dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); + if (priv->reg_name) + dev_pm_opp_put_regulator(priv->cpu_dev); + clk_put(policy->clk); if (!IS_ERR(priv->cpu_reg)) regulator_put(priv->cpu_reg);