From patchwork Thu Jan 28 08:20:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Viresh Kumar X-Patchwork-Id: 60680 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp331604lbb; Thu, 28 Jan 2016 00:21:51 -0800 (PST) X-Received: by 10.98.72.135 with SMTP id q7mr2618540pfi.151.1453969311662; Thu, 28 Jan 2016 00:21:51 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z9si15380273par.42.2016.01.28.00.21.51; Thu, 28 Jan 2016 00:21:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965695AbcA1IVm (ORCPT + 30 others); Thu, 28 Jan 2016 03:21:42 -0500 Received: from mail-pa0-f54.google.com ([209.85.220.54]:34589 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965515AbcA1IVe (ORCPT ); Thu, 28 Jan 2016 03:21:34 -0500 Received: by mail-pa0-f54.google.com with SMTP id uo6so19921416pac.1 for ; Thu, 28 Jan 2016 00:21:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=iWLRtEiRoVmnr6EUkCIOf+hZyni16WXROvaaPvWgl6o=; b=b8awoLP8X/snLPQZQJe8YZFRtgfgA93IrTKRgCrPkHsXH30LiY9pbx28imDWPlG6ct hS2puDncC9om1gO9tEVl0tS93tXp6ciNiSVOrpyOEe6xdNkBz5MxQBRys1lkSarYfr/L Xnbxb4JcR9b9efLg85gGEQ0sVYkLZr/by+Os0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=iWLRtEiRoVmnr6EUkCIOf+hZyni16WXROvaaPvWgl6o=; b=CKgEuHCFlWAFXFm6lBDVtIIrf690Lvgeq26LSeS9f11w4rrS88CKFDpFxQ6g+0pvE+ ZnOuChK9inbQE4OlvMdKpCRIOUgB9K3KPuWghxD5HXRhHtrQXqYgc9X6s0/bPGL+cdHQ LByQatcGhmJ6Bv/U2n6O4DlxMQCcBrxdd6zQA4zxC6ZYdeiQ7CgxzH7Pdk40sT40LIFz gs6G2KB36F1yT6LX5N6DR1RX3VmzbwgquCuStF7b8ahcs/QICq1VArkg40CniFwEg8w2 NgEqrcE8fBOxi3U4Mt7+BiaWZGBWLez04skb79NxcR7gdi+i9BgWG/RP542wcZiSDXJB pO+w== X-Gm-Message-State: AG10YOTuF0+Xfu6Ne4byW9M5XqyAhUCCLZwGlNPvvRHqLlI524sVSb5YABIidYQFjlbRy3F3 X-Received: by 10.66.55.39 with SMTP id o7mr2605428pap.13.1453969293704; Thu, 28 Jan 2016 00:21:33 -0800 (PST) Received: from localhost ([122.171.121.234]) by smtp.gmail.com with ESMTPSA id h66sm14199898pfj.52.2016.01.28.00.21.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Jan 2016 00:21:33 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, Stephen Boyd , nm@ti.com, Viresh Kumar , linux-kernel@vger.kernel.org (open list) Subject: [PATCH V2 13/16] cpufreq: dt: Reuse dev_pm_opp_get_max_transition_latency() Date: Thu, 28 Jan 2016 13:50:42 +0530 Message-Id: X-Mailer: git-send-email 2.7.0.79.gdc08a19 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org OPP layer has all the information now to calculate transition latency (clock_latency + voltage_latency). Lets reuse the OPP layer helper dev_pm_opp_get_max_transition_latency() instead of open coding the same in cpufreq-dt driver. Signed-off-by: Viresh Kumar Reviewed-by: Stephen Boyd --- drivers/cpufreq/cpufreq-dt.c | 48 ++++---------------------------------------- 1 file changed, 4 insertions(+), 44 deletions(-) -- 2.7.0.79.gdc08a19 diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c index ca7a930ea283..214612c473d4 100644 --- a/drivers/cpufreq/cpufreq-dt.c +++ b/drivers/cpufreq/cpufreq-dt.c @@ -241,7 +241,6 @@ static int cpufreq_init(struct cpufreq_policy *policy) struct regulator *cpu_reg; struct clk *cpu_clk; struct dev_pm_opp *suspend_opp; - unsigned long min_uV = ~0, max_uV = 0; unsigned int transition_latency; bool opp_v1 = false; const char *name = NULL; @@ -340,49 +339,6 @@ static int cpufreq_init(struct cpufreq_policy *policy) priv->reg_name = name; of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance); - transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev); - if (!transition_latency) - transition_latency = CPUFREQ_ETERNAL; - - if (!IS_ERR(cpu_reg)) { - unsigned long opp_freq = 0; - - /* - * Disable any OPPs where the connected regulator isn't able to - * provide the specified voltage and record minimum and maximum - * voltage levels. - */ - while (1) { - struct dev_pm_opp *opp; - unsigned long opp_uV, tol_uV; - - rcu_read_lock(); - opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq); - if (IS_ERR(opp)) { - rcu_read_unlock(); - break; - } - opp_uV = dev_pm_opp_get_voltage(opp); - rcu_read_unlock(); - - tol_uV = opp_uV * priv->voltage_tolerance / 100; - if (regulator_is_supported_voltage(cpu_reg, - opp_uV - tol_uV, - opp_uV + tol_uV)) { - if (opp_uV < min_uV) - min_uV = opp_uV; - if (opp_uV > max_uV) - max_uV = opp_uV; - } - - opp_freq++; - } - - ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV); - if (ret > 0) - transition_latency += ret * 1000; - } - ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table); if (ret) { dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret); @@ -417,6 +373,10 @@ static int cpufreq_init(struct cpufreq_policy *policy) cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs; } + transition_latency = dev_pm_opp_get_max_transition_latency(cpu_dev); + if (!transition_latency) + transition_latency = CPUFREQ_ETERNAL; + policy->cpuinfo.transition_latency = transition_latency; of_node_put(np);