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[209.132.180.67]) by mx.google.com with ESMTP id b90si51412138pfj.165.2016.02.08.21.06.06; Mon, 08 Feb 2016 21:06:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dkim=pass header.i=@linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756649AbcBIFF7 (ORCPT + 30 others); Tue, 9 Feb 2016 00:05:59 -0500 Received: from mail-pf0-f170.google.com ([209.85.192.170]:34839 "EHLO mail-pf0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753117AbcBIFCJ (ORCPT ); Tue, 9 Feb 2016 00:02:09 -0500 Received: by mail-pf0-f170.google.com with SMTP id c10so54677531pfc.2 for ; Mon, 08 Feb 2016 21:02:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=ewmIR4bWDhVWjdvNGdE+6dGj95di1bC/cACrxtbidWI=; b=U/VBoetrbE4YbXcxe8P3qrh0pTeBx4E4edTfI2U6AIdwHREyopK89tNLkUKr735i4w SykkdgaBnhaRM1BlDdkeAiPYx+37mzAmIsjZX7LzvOGNw+UHniHCjBlWpndx5BF+xGmj bFsj3Cs7rrYnLKubB8r3qbR/WGVsgg5NDbI9k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=ewmIR4bWDhVWjdvNGdE+6dGj95di1bC/cACrxtbidWI=; b=K7q4FBDdL7ZJs3KLliFrpHVhSsg8RSUR5yXBAsuHDoX6RJnxrFqjCoNK7Br944zlWb uB8F3NWRaHFHJmnDjkIDKjeGc+/Gsm+j+O35nIUBa8CfE9TLCublWZOIQPrV+sNWSfFv +FP88dFsHR7uoqV6Ve5v6GaNoIHgv8QMOS6SeZYAL0ZQABNYgFizTI1Hj9YMPQFfCv6P vLkGbFZrXQamUoPPV08o3Pzk6Zk/uNGCSIglau1wx77XhASWxi6SLL2c3xLs7pZ8E7xs tUkMX80xdTA63eAivdl0YY1azaDxOg1ruqK1ZCutN8gc7u3qZLPNTwzmvdFb9PC4WwPz vCLw== X-Gm-Message-State: AG10YORzDmkx9V+6B+fuBnuWCcqCImYBX3dMkT0yIZsIjLhLht8RGHyYeecXkIFsc7CznvpQ X-Received: by 10.98.71.15 with SMTP id u15mr47986927pfa.161.1454994128867; Mon, 08 Feb 2016 21:02:08 -0800 (PST) Received: from localhost ([122.172.22.246]) by smtp.gmail.com with ESMTPSA id dz8sm47089433pab.19.2016.02.08.21.02.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 08 Feb 2016 21:02:08 -0800 (PST) From: Viresh Kumar To: Rafael Wysocki Cc: linaro-kernel@lists.linaro.org, linux-pm@vger.kernel.org, Stephen Boyd , nm@ti.com, Viresh Kumar , linux-kernel@vger.kernel.org (open list) Subject: [PATCH V3 11/16] cpufreq: dt: Pass regulator name to the OPP core Date: Tue, 9 Feb 2016 10:30:43 +0530 Message-Id: X-Mailer: git-send-email 2.7.1.370.gb2aa7f8 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org OPP core can handle the regulators by itself, and but it needs to know the name of the regulator to fetch. Add support for that. Signed-off-by: Viresh Kumar --- drivers/cpufreq/cpufreq-dt.c | 46 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) -- 2.7.1.370.gb2aa7f8 diff --git a/drivers/cpufreq/cpufreq-dt.c b/drivers/cpufreq/cpufreq-dt.c index 4c9f8a828f6f..2af75f8088bb 100644 --- a/drivers/cpufreq/cpufreq-dt.c +++ b/drivers/cpufreq/cpufreq-dt.c @@ -34,6 +34,7 @@ struct private_data { struct regulator *cpu_reg; struct thermal_cooling_device *cdev; unsigned int voltage_tolerance; /* in percentage */ + const char *reg_name; }; static struct freq_attr *cpufreq_dt_attr[] = { @@ -119,6 +120,30 @@ static int set_target(struct cpufreq_policy *policy, unsigned int index) return ret; } +/* + * An earlier version of opp-v1 bindings used to name the regulator + * "cpu0-supply", we still need to handle that for backwards compatibility. + */ +static const char *find_supply_name(struct device *dev, struct device_node *np) +{ + struct property *pp; + int cpu = dev->id; + + /* Try "cpu0" for older DTs */ + if (!cpu) { + pp = of_find_property(np, "cpu0-supply", NULL); + if (pp) + return "cpu0"; + } + + pp = of_find_property(np, "cpu-supply", NULL); + if (pp) + return "cpu"; + + dev_dbg(dev, "no regulator for cpu%d\n", cpu); + return NULL; +} + static int allocate_resources(int cpu, struct device **cdev, struct regulator **creg, struct clk **cclk) { @@ -200,6 +225,7 @@ static int cpufreq_init(struct cpufreq_policy *policy) unsigned long min_uV = ~0, max_uV = 0; unsigned int transition_latency; bool opp_v1 = false; + const char *name; int ret; ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk); @@ -229,6 +255,20 @@ static int cpufreq_init(struct cpufreq_policy *policy) } /* + * OPP layer will be taking care of regulators now, but it needs to know + * the name of the regulator first. + */ + name = find_supply_name(cpu_dev, np); + if (name) { + ret = dev_pm_opp_set_regulator(cpu_dev, name); + if (ret) { + dev_err(cpu_dev, "Failed to set regulator for cpu%d: %d\n", + policy->cpu, ret); + goto out_node_put; + } + } + + /* * Initialize OPP tables for all policy->cpus. They will be shared by * all CPUs which have marked their CPUs shared with OPP bindings. * @@ -273,6 +313,7 @@ static int cpufreq_init(struct cpufreq_policy *policy) goto out_free_opp; } + priv->reg_name = name; of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance); transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev); @@ -366,6 +407,8 @@ static int cpufreq_init(struct cpufreq_policy *policy) kfree(priv); out_free_opp: dev_pm_opp_of_cpumask_remove_table(policy->cpus); + if (name) + dev_pm_opp_put_regulator(cpu_dev); out_node_put: of_node_put(np); out_put_reg_clk: @@ -383,6 +426,9 @@ static int cpufreq_exit(struct cpufreq_policy *policy) cpufreq_cooling_unregister(priv->cdev); dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table); dev_pm_opp_of_cpumask_remove_table(policy->related_cpus); + if (priv->reg_name) + dev_pm_opp_put_regulator(priv->cpu_dev); + clk_put(policy->clk); if (!IS_ERR(priv->cpu_reg)) regulator_put(priv->cpu_reg);