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[209.132.180.67]) by mx.google.com with ESMTP id h3si30324744pgi.391.2018.11.16.02.05.12; Fri, 16 Nov 2018 02:05:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=El0fMUQ3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389583AbeKPUQs (ORCPT + 32 others); Fri, 16 Nov 2018 15:16:48 -0500 Received: from mail-pl1-f195.google.com ([209.85.214.195]:38848 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389547AbeKPUQr (ORCPT ); Fri, 16 Nov 2018 15:16:47 -0500 Received: by mail-pl1-f195.google.com with SMTP id e5so916151plb.5 for ; Fri, 16 Nov 2018 02:05:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QmjHQrzH3LPsysyMlkzh+Qm9rUsTXjJj/VyKPq1LnW8=; b=El0fMUQ3VTzNvHQ+No7yCC641xxRow2h2idrjFaDry9uLyyOekkFxoZPs17XGeLHtg Qr+tx6cU+FPu4OeX1wU737un2FszbXEtLjxKgMbXBLq1kjDeLP+HFFlya1yVbtwXrrXw sExaUXVj7dZcDR6VJ5rZgPdZZ9aqwTbf4gfwM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QmjHQrzH3LPsysyMlkzh+Qm9rUsTXjJj/VyKPq1LnW8=; b=NVJDriXZpY0j23v2E5NVDyVwDoNBFQV2sSNRD9gJWVZYBMnUQ/MsYJbk5xrl4K6kD8 n06SHMaoKwEqrBDI0EINnyYKAiEPXkQ9pCYq+1HBflr1wrC2+IMt5maTLdnMGumPZHOF 3pfM/0Dh/hbhd/TMteCTjYi/bMHD3LdAVdyCUsm6eky7dsVaxl73Zype/P3Bq6yZOIvu DajaRORkUE6Gv/xv69nfcpfpyBMTVL85Efn0iFQ8JqMhrbrSMyD6IEehF2Ps5v1VbB+u kfHwen9t9nAQKShWAdwI+H63aaIfvEQk2qdTkZt12t2Q/Hm6HEIT4CL4x1RMHqPRCM06 3iRw== X-Gm-Message-State: AGRZ1gLxJ06iPzaNopYTalmLlxS4DlY10EksqpZV3onAR4TYJ9pwuHJl tfo47fNzLWp4KOUlMGyttMQxbh7MsKM= X-Received: by 2002:a17:902:a70b:: with SMTP id w11mr6181411plq.84.1542362709696; Fri, 16 Nov 2018 02:05:09 -0800 (PST) Received: from localhost ([122.172.88.116]) by smtp.gmail.com with ESMTPSA id s22-v6sm56173002pfi.15.2018.11.16.02.05.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Nov 2018 02:05:09 -0800 (PST) From: Viresh Kumar To: Mark Rutland , Rob Herring , arm@kernel.org, Wei Xu Cc: Viresh Kumar , devicetree@vger.kernel.org, Vincent Guittot , Daniel Lezcano , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 05/10] ARM64: dts: hisilicon: Add all CPUs in cooling maps Date: Fri, 16 Nov 2018 15:34:28 +0530 Message-Id: <89bb8c62404aa875d597da89c18852ce81fb9f26.1542362530.git.viresh.kumar@linaro.org> X-Mailer: git-send-email 2.19.1.568.g152ad8e3369a In-Reply-To: References: MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Each CPU can (and does) participate in cooling down the system but the DT only captures a handful of them, normally CPU0, in the cooling maps. Things work by chance currently as under normal circumstances its the first CPU of each cluster which is used by the operating systems to probe the cooling devices. But as soon as this CPU ordering changes and any other CPU is used to bring up the cooling device, we will start seeing failures. Also the DT is rather incomplete when we list only one CPU in the cooling maps, as the hardware doesn't have any such limitations. Update cooling maps to include all devices affected by individual trip points. Signed-off-by: Viresh Kumar --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 10 ++++++++-- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 9 ++++++++- 2 files changed, 16 insertions(+), 3 deletions(-) -- 2.19.1.568.g152ad8e3369a diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index d943a96eedee..20ae40df61d5 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1118,12 +1118,18 @@ map0 { trip = <&target>; contribution = <1024>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; map1 { trip = <&target>; contribution = <512>; - cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 97d5bf2c6ec5..aec9e371c2a7 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -893,7 +893,14 @@ cooling-maps { map0 { trip = <&target>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; };